1. 08 11月, 2017 2 次提交
  2. 19 5月, 2017 1 次提交
    • B
      MIPS: PCI: Remove unused busn_offset · 7ee214b5
      Bjorn Helgaas 提交于
      pci_add_resource_offset() is for host bridge windows where the bridge
      translates CPU addresses to PCI bus addresses by adding an offset.  To my
      knowledge, no host bridge translates bus numbers, so this is only useful
      for MEM and IO windows.  In any event, host->busn_offset is never set to
      anything other than zero, so pci_add_resource() is sufficient.
      
      a2e50f53 ("MIPS: PCI: Add a hook for IORESOURCE_BUS in
      pci_controller/bridge_controller") also added busn_resource itself.  This
      is currently unused but may be used by future SGI IP27 fixes, so I left it
      there.
      
      Tested-by: Joshua Kinard <kumba@gentoo.org>	# SGI IP30 and IP27
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NJoshua Kinard <kumba@gentoo.org>
      7ee214b5
  3. 20 4月, 2017 1 次提交
  4. 19 4月, 2017 1 次提交
  5. 07 10月, 2016 1 次提交
    • P
      MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY · c5611df9
      Paul Burton 提交于
      Introduce 2 Kconfig symbols, CONFIG_PCI_DRIVERS_GENERIC &
      CONFIG_PCI_DRIVERS_LEGACY, which indicate whether the system should be
      built to for PCI drivers using the MIPS-specific struct pci_controller
      API (hereafter "legacy" drivers) or more generic drivers using only
      functionality provided by the PCI core (hereafter "generic" drivers).
      
      The Kconfig entries are created such that platforms have to select
      CONFIG_PCI_DRIVERS_GENERIC if they wish to use it - that is, the default
      is CONFIG_PCI_DRIVERS_LEGACY so that existing platforms need no
      modification.
      
      The functions declared in pci.h are rearranged with those provided only
      by pci-legacy.c being guarded by an #ifdef CONFIG_PCI_DRIVERS_LEGACY to
      ensure they are only used in configurations where they are implemented.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14345/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      c5611df9
  6. 06 10月, 2016 3 次提交
  7. 18 6月, 2016 1 次提交
    • B
      PCI: Unify pci_resource_to_user() declarations · 8221a013
      Bjorn Helgaas 提交于
      Replace the pci_resource_to_user() declarations in each arch that defines
      HAVE_ARCH_PCI_RESOURCE_TO_USER with a single one in linux/pci.h.
      
      Change the MIPS static inline implementation to a non-inline version so the
      static inline doesn't conflict with the new non-static linux/pci.h
      declaration.
      
      No functional change intended.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      8221a013
  8. 13 5月, 2016 1 次提交
  9. 08 3月, 2016 1 次提交
  10. 06 2月, 2016 1 次提交
  11. 08 6月, 2015 1 次提交
  12. 06 5月, 2015 1 次提交
  13. 01 4月, 2015 1 次提交
  14. 20 2月, 2015 1 次提交
  15. 25 11月, 2014 1 次提交
  16. 28 5月, 2014 1 次提交
  17. 19 9月, 2013 1 次提交
  18. 12 8月, 2013 1 次提交
    • T
      PCI: use weak functions for MSI arch-specific functions · 4287d824
      Thomas Petazzoni 提交于
      Until now, the MSI architecture-specific functions could be overloaded
      using a fairly complex set of #define and compile-time
      conditionals. In order to prepare for the introduction of the msi_chip
      infrastructure, it is desirable to switch all those functions to use
      the 'weak' mechanism. This commit converts all the architectures that
      were overidding those MSI functions to use the new strategy.
      
      Note that we keep two separate, non-weak, functions
      default_teardown_msi_irqs() and default_restore_msi_irqs() for the
      default behavior of the arch_teardown_msi_irqs() and
      arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
      code.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Tested-by: NDaniel Price <daniel.price@gmail.com>
      Tested-by: NThierry Reding <thierry.reding@gmail.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: linux390@de.ibm.com
      Cc: linux-s390@vger.kernel.org
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: x86@kernel.org
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: linux-ia64@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: David S. Miller <davem@davemloft.net>
      Cc: sparclinux@vger.kernel.org
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Signed-off-by: NJason Cooper <jason@lakedaemon.net>
      4287d824
  19. 01 7月, 2013 1 次提交
  20. 17 2月, 2013 1 次提交
  21. 01 2月, 2013 1 次提交
  22. 04 1月, 2013 1 次提交
    • G
      MIPS: drivers: remove __dev* attributes. · 28eb0e46
      Greg Kroah-Hartman 提交于
      CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
      markings need to be removed.
      
      This change removes the use of __devinit, __devexit_p, __devinitdata,
      and __devexit from these drivers.
      
      Based on patches originally written by Bill Pemberton, but redone by me
      in order to handle some of the coding style issues better, by hand.
      
      Cc: Bill Pemberton <wfp5p@virginia.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      28eb0e46
  23. 15 5月, 2012 1 次提交
  24. 24 2月, 2012 3 次提交
    • B
      PCI: collapse pcibios_resource_to_bus · fb127cb9
      Bjorn Helgaas 提交于
      Everybody uses the generic pcibios_resource_to_bus() supplied by the core
      now, so remove the ARCH_HAS_GENERIC_PCI_OFFSETS used during conversion.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      fb127cb9
    • B
      mips/PCI: get rid of device resource fixups · 96a6b9ad
      Bjorn Helgaas 提交于
      Tell the PCI core about host bridge address translation so it can take
      care of bus-to-resource conversion for us.
      
      Here's the wrinkle on Cobalt: we can't generate normal I/O port addresses
      on PCI because the GT-64111 doesn't do any address translation, so we have
      this:
      
        CPU I/O port addresses		[io 0x0000-0xffffff]
        PCI bus I/O port addresses	[io 0x10000000-0x10ffffff]
      
      Legacy-mode IDE controllers start out with the legacy bus addresses, e.g.,
      0x1f0, assigned by pci_setup_device().  These are outside the range of
      addresses GT-64111 can generate on PCI, but pcibios_fixup_device_resources()
      converted them to CPU addresses anyway by adding io_offset.  Therefore, we
      had to pre-adjust them in cobalt_legacy_ide_fixup().
      
      With io_offset = 0xf0000000, we had this:
      
        res->start = 0x1f0	initialized in pci_setup_device()
        res->start = 0x100001f0	-= io_offset in cobalt_legacy_ide_fixup()
        res->start = 0x1f0	+= io_offset in pcibios_fixup_device_resources()
      
      The difference after this patch is that the generic pci_bus_to_resource()
      only adds the offset if the bus address is inside a host bridge window.
      Since 0x1f0 is not a valid bus address and is not inside any windows, it is
      unaffected, so we now have this:
      
        region->start = 0x1f0	initialized in pci_setup_device()
        res->start = 0x1f0	no offset by pci_bus_to_resource()
      
      That means we can remove both pcibios_fixup_device_resources() and
      cobalt_legacy_ide_fixup().
      
      I would *rather* set the host bridge offset to zero (which corresponds
      to what the GT-64111 actually does), and have both CPU and PCI addresses
      of [io 0x10000000-0x10ffffff].  However, that would require changes to
      generic code that assumes legacy I/O addresses, such as pic1_io_resource
      ([io 0x0020-0x00021]), and we'd have to keep a Cobalt IDE fixup.
      
      Of course, none of this changes the fact that references to I/O port
      0x1f0 actually go to port 0x100001f0, not 0x1f0, on the Cobalt PCI bus.
      Fortunately the VT82C586 IDE controller only decodes the low 24 address
      bits, so it does work.
      
      CC: Ralf Baechle <ralf@linux-mips.org>
      CC: Yoichi Yuasa <yuasa@linux-mips.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      96a6b9ad
    • B
      mips/PCI: replace pci_probe_only with pci_flags · 29090606
      Bjorn Helgaas 提交于
      Some architectures (alpha, mips, powerpc) have an arch-specific
      "pci_probe_only" flag.  Others use PCI_PROBE_ONLY in pci_flags for
      the same purpose.  This moves mips to the pci_flags approach so
      generic code can use the same test across all architectures.
      
      CC: Ralf Baechle <ralf@linux-mips.org>
      CC: linux-mips@linux-mips.org
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      29090606
  25. 05 8月, 2010 1 次提交
  26. 13 3月, 2010 2 次提交
  27. 10 9月, 2009 1 次提交
  28. 18 6月, 2009 1 次提交
  29. 10 12月, 2008 1 次提交
  30. 11 10月, 2008 1 次提交
  31. 31 7月, 2008 1 次提交
  32. 20 7月, 2008 1 次提交
  33. 16 7月, 2008 1 次提交
  34. 12 10月, 2007 1 次提交