1. 28 11月, 2016 3 次提交
  2. 27 11月, 2016 1 次提交
  3. 25 10月, 2016 1 次提交
    • C
      dma-buf: Rename struct fence to dma_fence · f54d1867
      Chris Wilson 提交于
      I plan to usurp the short name of struct fence for a core kernel struct,
      and so I need to rename the specialised fence/timeline for DMA
      operations to make room.
      
      A consensus was reached in
      https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
      that making clear this fence applies to DMA operations was a good thing.
      Since then the patch has grown a bit as usage increases, so hopefully it
      remains a good thing!
      
      (v2...: rebase, rerun spatch)
      v3: Compile on msm, spotted a manual fixup that I broke.
      v4: Try again for msm, sorry Daniel
      
      coccinelle script:
      @@
      
      @@
      - struct fence
      + struct dma_fence
      @@
      
      @@
      - struct fence_ops
      + struct dma_fence_ops
      @@
      
      @@
      - struct fence_cb
      + struct dma_fence_cb
      @@
      
      @@
      - struct fence_array
      + struct dma_fence_array
      @@
      
      @@
      - enum fence_flag_bits
      + enum dma_fence_flag_bits
      @@
      
      @@
      (
      - fence_init
      + dma_fence_init
      |
      - fence_release
      + dma_fence_release
      |
      - fence_free
      + dma_fence_free
      |
      - fence_get
      + dma_fence_get
      |
      - fence_get_rcu
      + dma_fence_get_rcu
      |
      - fence_put
      + dma_fence_put
      |
      - fence_signal
      + dma_fence_signal
      |
      - fence_signal_locked
      + dma_fence_signal_locked
      |
      - fence_default_wait
      + dma_fence_default_wait
      |
      - fence_add_callback
      + dma_fence_add_callback
      |
      - fence_remove_callback
      + dma_fence_remove_callback
      |
      - fence_enable_sw_signaling
      + dma_fence_enable_sw_signaling
      |
      - fence_is_signaled_locked
      + dma_fence_is_signaled_locked
      |
      - fence_is_signaled
      + dma_fence_is_signaled
      |
      - fence_is_later
      + dma_fence_is_later
      |
      - fence_later
      + dma_fence_later
      |
      - fence_wait_timeout
      + dma_fence_wait_timeout
      |
      - fence_wait_any_timeout
      + dma_fence_wait_any_timeout
      |
      - fence_wait
      + dma_fence_wait
      |
      - fence_context_alloc
      + dma_fence_context_alloc
      |
      - fence_array_create
      + dma_fence_array_create
      |
      - to_fence_array
      + to_dma_fence_array
      |
      - fence_is_array
      + dma_fence_is_array
      |
      - trace_fence_emit
      + trace_dma_fence_emit
      |
      - FENCE_TRACE
      + DMA_FENCE_TRACE
      |
      - FENCE_WARN
      + DMA_FENCE_WARN
      |
      - FENCE_ERR
      + DMA_FENCE_ERR
      )
       (
       ...
       )
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: NSumit Semwal <sumit.semwal@linaro.org>
      Acked-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
      f54d1867
  4. 29 8月, 2016 1 次提交
  5. 16 7月, 2016 6 次提交
    • R
      drm/msm: wire up vmap shrinker · e1e9db2c
      Rob Clark 提交于
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      e1e9db2c
    • R
      drm/msm: change gem->vmap() to get/put · 18f23049
      Rob Clark 提交于
      Before we can add vmap shrinking, we really need to know which vmap'ings
      are currently being used.  So switch to get/put interface.  Stubbed put
      fxns for now.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      18f23049
    • R
      drm/msm: shrinker support · 68209390
      Rob Clark 提交于
      For a first step, only purge obj->madv==DONTNEED objects.  We could be
      more agressive and next try unpinning inactive objects..  but that is
      only useful if you have swap.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      68209390
    • R
      drm/msm: add madvise ioctl · 4cd33c48
      Rob Clark 提交于
      Doesn't do anything too interesting until we wire up shrinker.  Pretty
      much lifted from i915.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      4cd33c48
    • A
      drm/msm/mdp5: Create a separate MDP5 device · 1dd0a0b1
      Archit Taneja 提交于
      In order to have a tree-like device hierarchy between MDSS and its
      sub-blocks (MDP5, DSI, HDMI, eDP etc), we need to create a separate
      device/driver for MDP5. Currently, MDP5 and MDSS are squashed
      together are are tied to the top level platform_device, which is
      also the one used to create drm_device.
      
      The mdp5_kms_init code is split into two parts. The part where device
      resources are allocated are associated with the MDP5 driver's probe,
      the rest is executed later when we initialize modeset.
      
      With this change, unlike MDP4, the MDP5 platform_device isn't tied to
      the top level drm_device anymore. The top level drm_device is now
      associated with a platform device that corresponds to MDSS wrapper
      hardware.
      
      Create mdp5_init/destroy funcs that will be used by the MDP5 driver
      probe/remove. Use the HW_VERSION register in the MDP5 register address
      space. Both the MDSS and MDP VERSION registers give out identical
      version info.
      
      The older mdp5_kms_init code is left as is for now, this would be removed
      later when we have all the pieces to support the new device hierarchy.
      Signed-off-by: NArchit Taneja <architt@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      1dd0a0b1
    • A
      drm/msm/mdp5: Add MDSS top level driver · 990a4007
      Archit Taneja 提交于
      SoCs that contain MDP5 have a top level wrapper called MDSS that manages
      clocks, power and irq for the sub-blocks within it.
      
      Currently, the MDSS portions are stuffed into the MDP5 driver. This makes
      it hard to represent the DT bindings in the correct way. We create a top
      level MDSS helper that handles these parts. This is essentially moving out
      some of the mdp5_kms irq code and MDSS register space and keeping it as a
      separate entity. We haven't given any clocks to the top level MDSS yet,
      but a AHB clock would be added in the future to access registers.
      
      One thing to note is that the resources allocated by this helper are
      tied to the top level platform_device (the one that allocates the
      drm_device struct too). This device would be the parent to MDSS
      sub-blocks like MDP5, DSI, eDP etc.
      Signed-off-by: NArchit Taneja <architt@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      990a4007
  6. 08 5月, 2016 7 次提交
  7. 02 5月, 2016 1 次提交
  8. 04 3月, 2016 1 次提交
    • A
      drm/msm: rename hdmi symbols · fcda50c8
      Arnd Bergmann 提交于
      Global symbols in the kernel should be prefixed by the name
      of the subsystem and/or driver to avoid conflicts when all
      code is built-in.
      
      In this case, function names like 'hdmi_register' or 'hdmi_set_mode'
      are way too generic for an MSM specific DRM driver, so I'm renaming
      them all to msm_hdmi_* here.
      
      I also rename a lot of the 'static' symbols along with the global
      names for consistency, even though those are relatively harmless;
      they might only be slightly confusing when they show up in
      backtraces.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      fcda50c8
  9. 03 3月, 2016 1 次提交
  10. 14 12月, 2015 1 次提交
  11. 24 11月, 2015 1 次提交
  12. 16 8月, 2015 3 次提交
  13. 15 8月, 2015 1 次提交
  14. 30 7月, 2015 1 次提交
  15. 12 6月, 2015 1 次提交
    • R
      drm/msm: fix timeout calculation · 56c2da83
      Rob Clark 提交于
      The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but
      converting this directly to jiffies doesn't take into account the
      initial jiffies count at boot, which may differ from the base time
      of CLOCK_MONOTONIC.
      
      TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that
      instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as
      suggested by Arnd)
      
      v2: switch over from 'struct timespec' to ktime_t throughout, since
      'struct timespec' will be deprecated (as suggested by Arnd)
      v3: minor cosmetic tweaks
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      56c2da83
  16. 02 4月, 2015 1 次提交
  17. 02 2月, 2015 2 次提交
  18. 19 12月, 2014 1 次提交
  19. 18 12月, 2014 1 次提交
    • D
      drm/atomic-helper: Again check modeset *before* plane states · b4274fbe
      Daniel Vetter 提交于
      This essentially reverts
      
      commit 934ce1c2
      Author: Rob Clark <robdclark@gmail.com>
      Date:   Wed Nov 19 16:41:33 2014 -0500
      
          drm/atomic: check mode_changed *after* atomic_check
      
      Depending upon the driver both orders (or maybe even interleaving) is
      required:
      - If ->atomic_check updates ->mode_changed then helper_check_modeset
        must be run afters.
      - If ->atomic_check depends upon accurate adjusted dotclock values for
        e.g. watermarks, then helper_check_modeset must be run first.
      
      The failure mode in the first case is usually a totally angry hw
      because the pixel format switching doesn't happen. The failure mode in
      the later case is usually nothing, since in most cases the old
      adjusted mode from the previous modeset wont be too far off to be a
      problem. So just underruns and perhaps even just suboptimal (from a
      power consumption) watermarks.
      
      Furthermore in the transitional helpers we only call ->atomic_check
      after the new modeset state has been fully set up (and hence
      computed).
      
      Given that asymmetry in expected failure modes I think it's safer to
      go back to the older order. So do that and give msm a special check
      function to compensate.
      
      Also update kerneldoc to explain this a bit.
      
      v2: Actually add the missing hunk Rob spotted.
      
      v3: Move msm_atomic_check into msm_atomic.c, requested by Rob.
      
      Cc: Rob Clark <robdclark@gmail.com>
      Reviewed-by: NRob Clark <robdclark@gmail.com>
      Tested-by: NRob Clark <robdclark@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      b4274fbe
  20. 21 11月, 2014 1 次提交
    • R
      drm/msm/mdp5: use irqdomains · f6a8eaca
      Rob Clark 提交于
      For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
      mdp block.  In order to decouple hdmi/eDP/etc, register an irq domain
      in mdp5.  When hdmi/dsi/etc are used with mdp4, they can directly setup
      their irqs in their DT nodes as normal.  When used with mdp5, instead
      set the mdp device as the interrupt-parent, as in:
      
      	mdp: qcom,mdss_mdp@fd900000 {
      		compatible = "qcom,mdss_mdp";
      		interrupt-controller;
      		#interrupt-cells = <1>;
      		...
      	};
      
      	hdmi: qcom,hdmi_tx@fd922100 {
      		compatible = "qcom,hdmi-tx-8074";
      		interrupt-parent = <&mdp>;
      		interrupts = <8 0>;   /* MDP5_HW_INTR_STATUS.INTR_HDMI */
      		...
      	};
      
      There is a slight awkwardness, in that we cannot disable child irqs
      at the mdp level, they can only be cleared in the child block.  So
      you must not use threaded irq handlers in the child.  I'm not sure
      if there is a better way to deal with that.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      f6a8eaca
  21. 17 11月, 2014 4 次提交