Each MU has four pairs of rx/tx data register with four rx/tx interrupts
which can also be used as a separate channel.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

The Messaging Unit module enables two processors within
the SoC to communicate and coordinate by passing messages
(e.g. data, status and control) through the MU interface.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Introduce bindings for RPMh regulator devices found on some
Qualcomm Technlogies, Inc. SoCs.  These devices allow a given
processor within the SoC to make PMIC regulator requests which
are aggregated within the RPMh hardware block along with requests
from other processors in the SoC to determine the final PMIC
regulator hardware state.
Signed-off-by: NDavid Collins <collinsd@codeaurora.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Adds the documentation for XGMAC2 DT bindings.
Signed-off-by: NJose Abreu <joabreu@synopsys.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add compatibility strings for the internal switch in the Broadcom
Omega SoC family (BCM5831X/BCM1140X) to B53.
Signed-off-by: NArun Parameswaran <arun.parameswaran@broadcom.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add binding document for a SoC built-in device using MediaTek protocol.
Which could be found on MT7622 SoC or other similar MediaTek SoCs.
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>

Y Soft is headquartered in the Czech Republic and it is a worldwide
provider of enterprise office solutions for print management.
Signed-off-by: NMichal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: NRob Herring <robh@kernel.org>

In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec
mute control, can also be used for general purpose. It is manipulated by
the GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI
pins can also be set in the same way.

Currently this GRF GPIO controller only supports the mute pin. If needed
in the future, the HDMI pins support can also be added.
Signed-off-by: NLevin Du <djw@t-chip.com.cn>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds documentation for the MediaTek Global Command Engine (GCE) unit
found in MT8173 SoCs.
Signed-off-by: NHoulong Wei <houlong.wei@mediatek.com>
Signed-off-by: NHS Liao <hs.liao@mediatek.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

Secure Proxy is another communication scheme in Texas Instrument's
devices intended to provide an unique communication path from various
processors in the System on Chip(SoC) to a central System Controller.

Secure proxy is, in effect, an evolution of current generation Message
Manager hardware block found in K2G devices. However the following
changes have taken place:

Secure Proxy instance exposes "threads" or "proxies" which is
primary representation of "a" communication channel. Each thread is
preconfigured by System controller configuration based on SoC usage
requirements. Secure proxy by itself represents a single "queue" of
communication but allows the proxies to be independently operated.

Each Secure proxy thread can uniquely have their own error and threshold
interrupts allowing for more fine control of IRQ handling.

Provide an hardware description of the same for device tree
representation.

See AM65x Technical Reference Manual (SPRUID7, April 2018)
for further details: http://www.ti.com/lit/pdf/spruid7Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

This patch enables regulators for the Qualcomm Bluetooth wcn3990
controller.
Signed-off-by: NBalakrishna Godavarthi <bgodavar@codeaurora.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NStephen Boyd <swboyd@chromium.org>
Reviewed-by: NMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>

The hip06 and hip07 SoCs contain a number of these crypto units which
accelerate AES and DES operations.
Signed-off-by: NJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Add clock phandle, of the core clock driving the mdio block, as an
optional property to the Broadcom iProc mdio mux.

The clock, when specified, will be used to setup the rate adjust registers
in the mdio to derrive the mdio's operating frequency.
Signed-off-by: NArun Parameswaran <arun.parameswaran@broadcom.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Modify the base address of the Broadcom iProc MDIO mux driver to
point to the start of the block's register address space.
Signed-off-by: NArun Parameswaran <arun.parameswaran@broadcom.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Update binding document for MSM8996.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Signed-off-by: NTodor Tomov <todor.tomov@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHans Verkuil <hansverk@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>

Use tabs.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Signed-off-by: NTodor Tomov <todor.tomov@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHans Verkuil <hansverk@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>

Use more logical clock names - similar to the names in documentation.
This will allow better handling of the clocks in the driver when support
for more hardware versions is added - equivalent clocks on different
hardware versions will have the same name.

Note: No dts is using this device (and clock names) yet.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Signed-off-by: NTodor Tomov <todor.tomov@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHans Verkuil <hansverk@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>

Adding documentation for adgs1408/1409 multiplexer. The bindings
follow the standard SPI and mux bindings and do not require any
additional custom properties.
Signed-off-by: NMircea Caprioru <mircea.caprioru@analog.com>
Reviewed-by: NRob Herring <robh@kernel.org>
[peda: reword idle-state to non-array for singular mux controller]
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The uartlite devicetree binding was missed out.
Add the binding documentation for uartlite that is already in use.
Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Describe interrupts property in more detail, especially when there are
more than one interrupt.
Signed-off-by: NChris Brandt <chris.brandt@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Remove qcom prefix from machine driver dt bindings of
apq8096 SoC.
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRohit kumar <rohitkr@codeaurora.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add devicetree bindings documentation file for SDM845 sound card.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRohit kumar <rohitkr@codeaurora.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on px30 platform.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLiang Chen <cl@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch adds SDHI support for the R8A77990 SoC (R-Car E3). No driver changes
needed for anything except HS400 which we will enable separately later.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NKeiji Hayashibara <hayashibara.keiji@socionext.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Commit 59b356ff ("mtd: m25p80: restore the status of SPI flash when
exiting") is the latest from a long history of attempts to add reboot
handling to handle stateful addressing modes on SPI flash. Some prior
mostly-related discussions:

http://lists.infradead.org/pipermail/linux-mtd/2013-March/046343.html
[PATCH 1/3] mtd: m25p80: utilize dedicated 4-byte addressing commands

http://lists.infradead.org/pipermail/barebox/2014-September/020682.html
[RFC] MTD m25p80 3-byte addressing and boot problem

http://lists.infradead.org/pipermail/linux-mtd/2015-February/057683.html
[PATCH 2/2] m25p80: if supported put chip to deep power down if not used

Previously, attempts to add reboot-time software reset handling were
rejected, but the latest attempt was not.

Quick summary of the problem:
Some systems (e.g., boot ROM or bootloader) assume that they can read
initial boot code from their SPI flash using 3-byte addressing. If the
flash is left in 4-byte mode after reset, these systems won't boot. The
above patch provided a shutdown/remove hook to attempt to reset the
addressing mode before we reboot. Notably, this patch misses out on
huge classes of unexpected reboots (e.g., crashes, watchdog resets).

Unfortunately, it is essentially impossible to solve this problem 100%:
if your system doesn't know how to reset the SPI flash to power-on
defaults at initialization time, no amount of software can really rescue
you -- there will always be a chance of some unexpected reset that
leaves your flash in an addressing mode that your boot sequence didn't
expect.

While it is not directly harmful to perform hacks like the
aforementioned commit on all 4-byte addressing flash, a
properly-designed system should not need the hack -- and in fact,
providing this hack may mask the fact that a given system is indeed
broken. So this patch attempts to apply this unsound hack more narrowly,
providing a strong suggestion to developers and system designers that
this is truly a hack. With luck, system designers can catch their errors
early on in their development cycle, rather than applying this hack long
term. But apparently enough systems are out in the wild that we still
have to provide this hack.

Document a new device tree property to denote systems that do not have a
proper hardware (or software) reset mechanism, and apply the hack (with
a loud warning) only in this case.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

This patch adds bindings for wcd9335 audio codec which can support both SLIMbus
and I2S/I2C interface.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

The integration of the Designware SPI controller on Microsemi SoCs requires
an extra register set to be able to give the IP control of the SPI
interface.

Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Adds bindings for Snapdragon 845 display processing unit

Changes in v2:
- Use SoC specific compatibles for mdss and dpu (Rob Herring)
- Use assigned-clocks to set initial clock frequency (Rob Herring)

Changes in v3 (all suggested by Rob Herring):
- Rename mdss_phys to mdss
- Correct description for clocks/assigned-clocks
- Rename mdp_phys to mdp
- Rename vbif_phys to vbif
- Remove redundant interrupt-parent from mdss_mdp
- Fully specify 'ranges' and use relative reg address in mdss_mdp

Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: NJeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: NRajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Adds mdp transfer time to msm dsi binding

Changes in v3:
- Added Rob's R-b
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: NRajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>

Add description of 'snps,incr-burst-type-adjustment' to binding
so that configuring devicetree.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Signed-off-by: NPengbo Mu <pengbo.mu@nxp.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

This patch adds mask parameter to define IRQ mux field.
This field could vary depend of IRQ mux selection register.
This parameter is needed if the mask is different of 0xf.
Signed-off-by: NLudovic Barre <ludovic.barre@st.com>
Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In case the exti line is not in line with the bank number (that is the case
when there is an hole between two banks, for example GPIOK and then GPIOZ),
use "st,bank-ioport" DT property to get the right exti line.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We want to create common code for v2 of the TSENS IP block that is used in
a large number of Qualcomm SoCs. "qcom,tsens-v2" should be able to handle
most of the common functionality start with a common get_temp() function.

It is also necessary to split out the memory regions for the TM and SROT
register banks because their offsets are not constant across SoC families.
Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

New bindings (using a syscon) are available for AP806 and CP110
compatibles. Add a reference to these files from the original
documentation.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Explain the thermal bindings now that the thermal IP is described being
inside of a system controller. Add a reference to the thermal-zone node.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

CP110 master/slave DT files have been merged in a DT de-duplication work
merged in v4.16. Update the syscon documentation accordingly to match
the current state of the DT nodes.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Explain the thermal bindings now that the thermal IP is described being
inside of a system controller. Add a reference to the thermal-zone node.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

There are multiple system controllers in CP110. Because all syscon nodes
use the same compatible, it is pertinent to use this same file to list
IPs inside it. Thus, change the header to be more generic, and align
with AP806 file.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

There are multiple system controllers in AP806. Because all syscon nodes
use the same compatible, it is pertinent to use this same file to list
IPs inside it. Thus, change the header to be more generic.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>