- 23 6月, 2015 3 次提交
-
-
由 Nicolas Ferre 提交于
Add sama5d2 to the biding documentation for this use of the GEM IP. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Nicolas Ferre 提交于
On sama5d4, we only have a GEM IP that is configured to do 10/100 Mbits. So the use of "Gigabit" can be confusing. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Nicolas Ferre 提交于
In the driver and the DT bindings we use the "atmel" prefix. Fix it in the binding documentation. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 12 6月, 2015 1 次提交
-
-
由 Vincent Cuissard 提交于
Add support of Marvell NFC chip controlled over UART Signed-off-by: NVincent Cuissard <cuissard@marvell.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 11 6月, 2015 1 次提交
-
-
由 Sergei Shtylyov 提交于
Ethernet AVB includes an Gigabit Ethernet controller (E-MAC) that is basically compatible with SuperH Gigabit Ethernet E-MAC. Ethernet AVB has a dedicated direct memory access controller (AVB-DMAC) that is a new design compared to the SuperH E-DMAC. The AVB-DMAC is compliant with 3 standards formulated for IEEE 802.1BA: IEEE 802.1AS timing and synchronization protocol, IEEE 802.1Qav real- time transfer, and the IEEE 802.1Qat stream reservation protocol. The driver only supports device tree probing, so the binding document is included in this patch. Based on the original patches by Mitsuhiro Kimura. Signed-off-by: NMitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 10 6月, 2015 1 次提交
-
-
由 Christophe Ricard 提交于
STMicroelectronics NFC NCI chips family is extending with the new ST21NFCC using the AMS AS39230 RF booster. The st21nfcb driver is relevant for this solution and might be with future products. Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 09 6月, 2015 2 次提交
-
-
由 Dan Murphy 提交于
Fix the device tree entries to modify the '_' to '-'. Also changes the names of the internal delay properties from -int- to -internal- as the -int- appeared as a keyword. Signed-off-by: NDan Murphy <dmurphy@ti.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Mark A. Greer 提交于
The current versions of the trf7970a has an erratum where it returns an extra byte in the response to 'Read Multiple Block' (RMB) commands. This command is issued to Type 5 tags (i.e., ISO/IEC 15693 tags) by the neard daemon. To handle this, define a new Device Tree property, 't5t-rmb-extra-byte-quirk', which indicates that the associated trf7970a device has this erratum. The trf7970a device driver will then ensure that the response length to RMB commands is reduced by one byte (for devices with the erratum). Signed-off-by: NMark A. Greer <mgreer@animalcreek.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 04 6月, 2015 1 次提交
-
-
由 Dan Murphy 提交于
Add support for the TI dp83867 Gigabit ethernet phy device. The DP83867 is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. Signed-off-by: NDan Murphy <dmurphy@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 31 5月, 2015 1 次提交
-
-
由 Mathieu Olivari 提交于
Add the device tree bindings documentation for the QCA IPQ806x variant of the Synopsys DesignWare MAC. Signed-off-by: NMathieu Olivari <mathieu@codeaurora.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 23 5月, 2015 1 次提交
-
-
由 Nathan Sullivan 提交于
Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 16 5月, 2015 3 次提交
-
-
由 Lendacky, Thomas 提交于
Simplify the device tree support of the amd-xgbe driver by defining the PHY-related resources within the ethernet device node. The support provides backwards compatibility with the original way. Update the driver version to 1.0.2. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Lendacky, Thomas 提交于
The AMD XGBE device is intended to work with a specific integrated PHY and that PHY is not meant to be a standalone PHY for use by other devices. As such this patch removes the phylib driver and implements the PHY support in the amd-xgbe driver (the majority of the logic from the phylib driver is moved into the amd-xgbe driver). Update the driver version to 1.0.1. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Joachim Eastwood 提交于
Add device tree binding documentation for nxp,lpc1850-dwmac. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 15 5月, 2015 1 次提交
-
-
由 Florian Fainelli 提交于
Some Ethernet PHY devices/switches may not properly release the MDIO bus during turn-around time, and fail to drive it low, which can be seen by some controllers as a read failure, while the data clocked in is still correct. Add a boolean property "broken-turn-around" which is parsed by the generic MDIO bus probing code and will set the corresponding bit in the MDIO bus phy_ignore_ta_mask bitmask for MDIO bus drivers to utilize that information. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 10 5月, 2015 1 次提交
-
-
由 Harini Katakam 提交于
Add "cdns,zynqmp-gem" to be used for Zynq Ultrascale+ MPSoC. Signed-off-by: NHarini Katakam <harinik@xilinx.com> Reviewed-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 17 4月, 2015 1 次提交
-
-
由 Vince Bridgers 提交于
The Synopsys stmmac fifo sizes are configurable, and need to be known in order to configure certain controller features. This patch adds tx-fifo-depth and rx-fifo-depth properties to the stmmac document file. Signed-off-by: NVince Bridgers <vbridger@opensource.altera.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 09 4月, 2015 1 次提交
-
-
由 Andrew Bresticker 提交于
The DWMAC block on certain SoCs (such as IMG Pistachio) have a second clock which must be enabled in order to access the peripheral's register interface, so add support for requesting and enabling an optional "pclk". Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 07 4月, 2015 1 次提交
-
-
由 Pavel Nakonechny 提交于
According to description in 'include/net/dsa.h', in cascade switches configurations where there are more than one interconnected devices, 'rtable' array in 'dsa_chip_data' structure is used to indicate which port on this switch should be used to send packets to that are destined for corresponding switch. However, dsa_of_setup_routing_table() fills 'rtable' with port numbers of the _target_ switch, but not current one. This commit removes redundant devicetree parsing and adds needed port number as a function argument. So dsa_of_setup_routing_table() now just looks for target switch number by parsing parent of 'link' device node. To remove possible misunderstandings with the way of determining target switch number, a corresponding comment was added to the source code and to the DSA device tree bindings documentation file. This was tested on a custom board with two Marvell 88E6095 switches with following corresponding routing tables: { -1, 10 } and { 8, -1 }. Signed-off-by: NPavel Nakonechny <pavel.nakonechny@skitlab.ru> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 28 3月, 2015 1 次提交
-
-
由 Iyappan Subramanian 提交于
Signed-off-by: NIyappan Subramanian <isubramanian@apm.com> Signed-off-by: NKeyur Chudgar <kchudgar@apm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 27 3月, 2015 1 次提交
-
-
由 Scott Branden 提交于
This patchset attempts to standardize the naming of dt-bindings documents based on the Broadcom vendor prefix of brcm. Although there are no guidelines currently present for how to name the dt-bindings document the "vendor,binding.txt" style is in use by some of the other vendors. Acked-by: NLee Jones <lee@kernel.org> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NScott Branden <sbranden@broadcom.com> Signed-off-by: NRob Herring <robh@kernel.org>
-
- 26 3月, 2015 1 次提交
-
-
由 Clément Perrochaud 提交于
Add a module to the NXP-NCI driver to support NFC controllers with an I2C control interface, such as the NPC100. Signed-off-by: NClément Perrochaud <clement.perrochaud@effinnov.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 25 3月, 2015 1 次提交
-
-
由 Eliad Peller 提交于
Add device tree binding documentation for TI's wilink (wl12xx and wl18xx) wlan chip. Signed-off-by: NEliad Peller <eliad@wizery.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NKalle Valo <kvalo@codeaurora.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 21 3月, 2015 2 次提交
-
-
由 WingMan Kwok 提交于
NetCP 1.5 available on newer K2 SoCs such as K2E and K2L introduced 3 variants of the ethss subsystem, 9 port, 5 port and 2 port. These have one host port towards the CPU and N external slave ports. To customize the driver for these new ethss sub systems, multiple compatibility strings are introduced. Currently some of parameters that are different on different variants such as number of ALE ports, stats modules and number of ports are defined through constants. These are now changed to variables in gbe_priv data that get set based on the compatibility string. This is required as there are no hardware identification registers available to distinguish among the variants of NetCP 1.5 ethss. However there is identification register available to differentiate between NetCP 1.4 vs NetCP 1.5 and the same is made use of in the code to differentiate them. For more reading on the details of this peripheral, please refer to the User Guide available at http://www.ti.com/lit/pdf/spruhz3Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NWingMan Kwok <w-kwok2@ti.com> CC: "David S. Miller" <davem@davemloft.net> CC: Mugunthan V N <mugunthanvnm@ti.com> CC: "Lad, Prabhakar" <prabhakar.csengg@gmail.com> CC: Grygorii Strashko <grygorii.strashko@ti.com> CC: Christoph Jaeger <cj@linux.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Markus Pargmann <mpa@pengutronix.de> CC: Kumar Gala <galak@codeaurora.org> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Mark Rutland <mark.rutland@arm.com> CC: Pawel Moll <pawel.moll@arm.com> CC: Rob Herring <robh+dt@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Karicheri, Muralidharan 提交于
Ethss has multiple modules within the sub system - switch sub system - sgmii - mdio - switch module NetCP driver re-uses existing davinci mdio driver. It requires to have its own register region to map the reg space. So restructure the code to use separate reg region for the individual modules it manages. Use range property to define register space of NetCP and use reg property to define individual reg spaces. So MDIO will have its own reg space to map. This is a pre-requisite to enable MDIO driver for NetCP. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NWingMan Kwok <w-kwok2@ti.com> CC: "David S. Miller" <davem@davemloft.net> CC: Mugunthan V N <mugunthanvnm@ti.com> CC: "Lad, Prabhakar" <prabhakar.csengg@gmail.com> CC: Grygorii Strashko <grygorii.strashko@ti.com> CC: Christoph Jaeger <cj@linux.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Markus Pargmann <mpa@pengutronix.de> CC: Kumar Gala <galak@codeaurora.org> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Mark Rutland <mark.rutland@arm.com> CC: Pawel Moll <pawel.moll@arm.com> CC: Rob Herring <robh+dt@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 19 3月, 2015 2 次提交
-
-
由 Brad Campbell 提交于
The TI CC2521 is an RF power amplifier that is designed to interface with the CC2520. Conveniently, it directly interfaces with the CC2520 and does not require any pins to be connected to a microcontroller/processor. Adding a CC2591 increases the CC2520's range, which is useful for border router and other wall-powered applications. Using the CC2591 with the CC2520 requires configuring the CC2520 GPIOs that are connected to the CC2591 to correctly set the CC2591 into TX and RX modes. Further, TI recommends that the CC2520_TXPOWER and CC2520_AGCCTRL1 registers are set differently to maximize the CC2591's performance. These settings are covered in TI Application Note AN065. This patch adds an optional `amplified` field to the cc2520 entry in the device tree. If present, the CC2520 will be configured to operate with a CC2591. The expected pin mapping is: CC2520 GPIO0 --> CC2591 EN CC2520 GPIO5 --> CC2591 PAEN Signed-off-by: NBrad Campbell <bradjc5@gmail.com> Acked-by: NVarka Bhadram <varkabhadram@gmail.com> Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>
-
由 Keyur Chudgar 提交于
Signed-off-by: NKeyur Chudgar <kchudgar@apm.com> Signed-off-by: NIyappan Subramanian <isubramanian@apm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 09 3月, 2015 1 次提交
-
-
由 Boris BREZILLON 提交于
Add missing "cdns,at91sam9260-macb", "atmel,sama5d3-gem" and "atmel,sama5d4-gem" compatible strings. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 05 3月, 2015 1 次提交
-
-
由 Iyappan Subramanian 提交于
Signed-off-by: NIyappan Subramanian <isubramanian@apm.com> Signed-off-by: NKeyur Chudgar <kchudgar@apm.com> Tested-by: NMark Langsdorf <mlangsdo@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 28 2月, 2015 2 次提交
-
-
由 Alexander Aring 提交于
While testing I experience a deadlock while using the at86rf233 on a raspberry pi. The reason was an edge triggered gpio irq because the irq triggered while irq was disabled. This issue doesn't happend on a level triggered irq because the irq will hit after calling enable_irq. This patch adds a warning that it's not recommended to use a edge-triggered irq type. Also change the examples to high-level irqtype. Signed-off-by: NAlexander Aring <alex.aring@gmail.com> Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>
-
由 Alexander Aring 提交于
This patch adds support for setting the xtal trim register. Some at86rf2xx transceiver boards needs fine tuning the xtal capacitor. Signed-off-by: NAlexander Aring <alex.aring@gmail.com> Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>
-
- 26 2月, 2015 1 次提交
-
-
由 Tom Lendacky 提交于
The PHY requires different settings for the Decision Feedback Analyzer (DFE) when running in KX mode vs. KR mode. Update the code to change these settings when changing modes in order to provide a more stable link. Additionally, adjust the 10GbE PQ skew default setting to a more sane value. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 04 2月, 2015 1 次提交
-
-
由 Shruti Kanetkar 提交于
The device tree binding(s) document has fallen out of sync with the driver code. Update the list of supported devices to reflect current driver capabilities Change-Id: I440d8de2ee2d9c3b7b23e69b3da851cab18a4c9a Signed-off-by: NShruti Kanetkar <Kanetkar.Shruti@gmail.com> Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 29 1月, 2015 1 次提交
-
-
由 Masanari Iida 提交于
This patch fix multiple words such as "the the" and "which which" in Documentation/devicetree. Signed-off-by: NMasanari Iida <standby24x7@gmail.com> Signed-off-by: NJonathan Corbet <corbet@lwn.net>
-
- 28 1月, 2015 1 次提交
-
-
由 Christophe Ricard 提交于
On st21nfca, the mechanism to enable a secure element needs to add 2 properties in order manage the SWP line correctly. Document ese-present and uicc-present properties. Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 27 1月, 2015 1 次提交
-
-
由 Sonic Zhang 提交于
This property define the AXI bug lenth. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 26 1月, 2015 2 次提交
-
-
由 Christophe Ricard 提交于
Other drivers are following the following compatible string format for dts: s/_/-/ Because some devices may still use the previous string, the new corrected string is added to the of_device_id table. Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
由 Christophe Ricard 提交于
Other drivers are following the following compatible string format for dts: s/_/-/ Because some devices may still use the previous string, the new corrected string is added to the of_device_id table. Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
-
- 25 1月, 2015 1 次提交
-
-
由 Romain Perier 提交于
As no property for phy regulator was documented in this dt-binding documentation, this commit adds an entry for the optional property phy-supply. Signed-off-by: NRomain Perier <romain.perier@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 20 1月, 2015 1 次提交
-
-
由 Karicheri, Muralidharan 提交于
The network coprocessor (NetCP) is a hardware accelerator that processes Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet switch sub-module to send and receive packets. NetCP also includes a packet accelerator (PA) module to perform packet classification operations such as header matching, and packet modification operations such as checksum generation. NetCP can also optionally include a Security Accelerator(SA) capable of performing IPSec operations on ingress/egress packets. Keystone SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates per Ethernet port. NetCP Subsystem device tree layout looks something like below: ----------------------------- NetCP subsystem(10G or 1G) ----------------------------- | |-> NetCP Devices -> | | |-> GBE/XGBE Switch | | | |-> Packet Accelerator | | | |-> Security Accelerator | | | |-> NetCP Interfaces -> | |-> Ethernet Port 0 | |-> Ethernet Port 1 | |-> Ethernet Port 2 | |-> Ethernet Port 3 Common driver supports GBE as well XGBE network processors. Cc: Rob Herring <robh+dt@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: David Miller <davem@davemloft.net> Cc: Santosh Shilimkar <santosh.shilimkar@kernel.org> Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-