1. 04 2月, 2011 1 次提交
  2. 07 1月, 2011 2 次提交
  3. 22 11月, 2010 1 次提交
  4. 06 10月, 2010 2 次提交
    • A
      drm/radeon/kms: add drm blit support for evergreen · d7ccd8fc
      Alex Deucher 提交于
      This patch implements blit support for bo moves using
      the 3D engine.  It uses the same method as r6xx/r7xx:
      - store the base state in an IB
      - emit variable state and vertex buffers to do the blit
      
      This allows the hw to move bos using the 3D engine and allows
      full use of vram beyond the pci aperture size.
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d7ccd8fc
    • A
      drm/radeon/kms: enable writeback (v2) · 724c80e1
      Alex Deucher 提交于
      When writeback is enabled, the GPU shadows writes to certain
      registers into a buffer in memory.  The driver can then read
      the values from the shadow rather than reading back from the
      register across the bus.  Writeback can be disabled by setting
      the no_wb module param to 1.
      
      On r6xx/r7xx/evergreen, the following registers are shadowed:
      - CP scratch registers
      - CP read pointer
      - IH write pointer
      On r1xx-rr5xx, the following registers are shadowed:
      - CP scratch registers
      - CP read pointer
      
      v2:
      - Combine wb patches for r6xx-evergreen and r1xx-r5xx
      - Writeback is disabled on AGP boards since it tends to be
      unreliable on AGP using the gart.
      - Check radeon_wb_init return values properly.
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      724c80e1
  5. 02 8月, 2010 1 次提交
    • D
      drm/radeon/kms: check/restore sanity before doing anything else with GPU. · 4c712e6c
      Dave Airlie 提交于
      On systems using kexec, the new kernel is booted straight from the old kernel, without any warning to the graphics driver. So the GPU is basically left as-is in a running state, however the CPU side is completly reset.
      
      Without stating the saneness of anyone using kexec on live systems, we should at least try not to crash the GPU. This patch resets 3 registers to 0 that could cause bad things to happen to the running system.
      
      This allows kexec to work on a Power6/RN50 system.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      4c712e6c
  6. 01 6月, 2010 1 次提交
  7. 18 5月, 2010 6 次提交
  8. 09 4月, 2010 2 次提交
  9. 06 4月, 2010 3 次提交
    • J
      drm/radeon/kms: simplify & improve GPU reset V2 · 90aca4d2
      Jerome Glisse 提交于
      This simplify and improve GPU reset for R1XX-R6XX hw, it's
      not 100% reliable here are result:
      - R1XX/R2XX works bunch of time in a row, sometimes it
        seems it can work indifinitly
      - R3XX/R3XX the most unreliable one, sometimes you will be
        able to reset few times, sometimes not even once
      - R5XX more reliable than previous hw, seems to work most
        of the times but once in a while it fails for no obvious
        reasons (same status than previous reset just no same
        happy ending)
      - R6XX/R7XX are lot more reliable with this patch, still
        it seems that it can fail after a bunch (reset every
        2sec for 3hour bring down the GPU & computer)
      
      This have been tested on various hw, for some odd reasons
      i wasn't able to lockup RS480/RS690 (while they use to
      love locking up).
      
      Note that on R1XX-R5XX the cursor will disapear after
      lockup haven't checked why, switch to console and back
      to X will restore cursor.
      
      Next step is to record the bogus command that leaded to
      the lockup.
      
      V2 Fix r6xx resume path to avoid reinitializing blit
      module, use the gpu_lockup boolean to avoid entering
      inifinite waiting loop on fence while reiniting the GPU
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      90aca4d2
    • J
      drm/radeon/kms: rename gpu_reset to asic_reset · a2d07b74
      Jerome Glisse 提交于
      Patch rename gpu_reset to asic_reset in prevision of having
      gpu_reset doing more stuff than just basic asic reset.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      a2d07b74
    • J
      drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4 · 225758d8
      Jerome Glisse 提交于
      This patch cleanup the fence code, it drops the timeout field of
      fence as the time to complete each IB is unpredictable and shouldn't
      be bound.
      
      The fence cleanup lead to GPU lockup detection improvement, this
      patch introduce a callback, allowing to do asic specific test for
      lockup detection. In this patch the CP is use as a first indicator
      of GPU lockup. If CP doesn't make progress during 1second we assume
      we are facing a GPU lockup.
      
      To avoid overhead of testing GPU lockup frequently due to fence
      taking time to be signaled we query the lockup callback every
      500msec. There is plenty code comment explaining the design & choise
      inside the code.
      
      This have been tested mostly on R3XX/R5XX hw, in normal running
      destkop (compiz firefox, quake3 running) the lockup callback wasn't
      call once (1 hour session). Also tested with forcing GPU lockup and
      lockup was reported after the 1s CP activity timeout.
      
      V2 switch to 500ms timeout so GPU lockup get call at least 2 times
         in less than 2sec.
      V3 store last jiffies in fence struct so on ERESTART, EBUSY we keep
         track of how long we already wait for a given fence
      V4 make sure we got up to date cp read pointer so we don't have
         false positive
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      225758d8
  10. 15 3月, 2010 3 次提交
  11. 01 3月, 2010 1 次提交
  12. 23 2月, 2010 1 次提交
  13. 18 2月, 2010 2 次提交
  14. 09 2月, 2010 3 次提交
  15. 05 2月, 2010 1 次提交
  16. 08 1月, 2010 1 次提交
  17. 23 12月, 2009 1 次提交
  18. 08 12月, 2009 1 次提交
  19. 02 12月, 2009 2 次提交
    • A
      drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3) · d8f60cfc
      Alex Deucher 提交于
      This enables the use of interrupts on r6xx/r7xx hardware.
      Interrupts are implemented via a ring buffer.  The GPU adds
      interrupts vectors to the ring and the host reads them off
      in the interrupt handler.  The interrupt controller requires
      firmware like the CP.  This firmware must be installed and
      accessble to the firmware loader for interrupts to function.
      
      MSIs don't seem to work on my RS780.  They work fine on all
      my discrete cards.  I'm not sure about other RS780s or
      RS880s.  I've disabled MSIs on RS780 and RS880, but it would
      probably be worth checking on some other systems.
      
      v2 - fix some checkpatch.pl problems;
           re-read the disp int status reg if we restart the ih;
      
      v3 - remove the irq handler if r600_irq_init() fails;
           remove spinlock in r600_ih_ring_fini();
           move ih rb overflow check to r600_get_ih_wptr();
           move irq ack to separate function;
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d8f60cfc
    • D
      drm/radeon/kms: add HDP flushing for all GPUs. · 23956dfa
      Dave Airlie 提交于
      rendercheck under kms on r600s was failing due to HDP flushing not happening.
      
      This adds HDP flushing to the object wait function for r100->r700 families.
      
      rendercheck passes basic tests on r600 with this change.
      Acked-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      23956dfa
  20. 06 11月, 2009 1 次提交
  21. 02 10月, 2009 4 次提交