These platforms provide a clock to their watchdog, in each
case this is the peripheral clock (PCLK), so explicitly
name the clock in the device tree.

Take this opportunity to add the "faraday,ftwdt010"
compatible as fallback to the watchdog IP blocks.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:

 - PCIE INT A is IRQ 122
 - PCIE INT B is IRQ 123
 - PCIE INT C is IRQ 124
 - PCIE INT D is IRQ 125

Invert the mapping information in corresponding DT node to reflect
that.

Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d575 ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>

Added ADTRG edge type property as interrupt edge type value
Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Acked-by: NJonathan Cameron <jic23@kernel.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>

Enable pinctrl for ADTRG pin (PD31) for ADC hardware trigger support.
Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Acked-by: NJonathan Cameron <jic23@kernel.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>

The PHY ID is incorrect. It leads to troubles when resuming from standby
or mem power states.
Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Fixes: af690fa3 ("ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support")
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>

Contrary to other RPi devices, RPi3 uses uart0 to communicate with
the BCM43438 bluetooth controller. uart1 is then used for the console.
Today, the console configuration is inherited from the bcm283x dtsi
(bootargs) which is not the correct one for the RPi3. This leads to
routing issue and confuses the Bluetooth controller with unexpected
data.

This patch introduces chosen/stdout path to configure console to uart0
on bcm283x family and overwrite it to uart1 in the RPi3 dts.

Create serial0/1 aliases referring to uart0 and uart1 paths.
Remove unneeded earlyprintk.

Fixes: 4188ea2a ("ARM: bcm283x: Define UART pinmuxing on board level")
Signed-off-by: NLoic Poulain <loic.poulain@gmail.com>
Tested-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NEric Anholt <eric@anholt.net>

Currently, same stm32f429-pinctrl driver is used for stm32f429 and
stm32f469. As pin map is different between those 2 MCUs,
a stm32f469-pinctrl driver has been recently added.
This patch
 -allows to use stm32f469-pinctrl driver for stm32f469 boards
 -reworks stm32 devicetree files to fit with stm32f429 / stm32f469

In the same time it fixes an issue when only MACH_STM32F469 flag is
selected in menuconfig.

Fixes: d28bcd53 ("ARM: stm32: Introduce MACH_STM32F469 flag")
Reported-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

To declare gpio interrupt line for STMPE1600, 2 possibilities are offered:
-use gpio binding (and then the gpiolib interface inside driver)
-use interrupt binding as each gpio-controller are also interrupt controller
 on stm32f429.

In STMPE 1600 node both (gpio and interrupt) bindings are defined.
This patch fixes this issue and use only interrupt binding.

Fixes: c04b2e72 ("ARM: dts: stm32: Enable STMPE1600 gpio expander of STM32F429-EVAL board")
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

All the Armada 38x(380, 385, 388) have a silicon issue in
the I2C controller which violates the I2C repeated start timing
(errata FE-8471889).

i2c-mv64xxx driver handles this errata based on the compatible string
"marvell,mv78230-a0-i2c".

This patch activates the "marvell,mv78230-a0-i2c" compatible string
for the I2C controller on armada-38x SoC based devices.
Signed-off-by: NKalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

Use integer numbers for LEDs, 0 is the flash and 1 is the indicator.
Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NJacek Anaszewski <jacek.anaszewski@gmail.com>

DT bindings document the property "ams,input-max-microamp" that limits the
chip's maximum input current. The driver and the DTS however used
"peak-current-limit" property. Fix this by using the property documented
in DT binding documentation.
Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NJacek Anaszewski <jacek.anaszewski@gmail.com>

Add aliases for serial and ethernet nodes. Serial
aliases help keep order of tty nodes fixed and
ethernet alias is used by bootloader to setup mac
address correctly.
Reported-by: NAdam Ford <aford173@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Fixes: dd7deaf2 ("ARM: davinci: da850: add DT node for ethernet")
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

On am438x EPOS boards there is only one ethernet port, remove extra
port definition.

This boot log warnings during PHY detection.
Signed-off-by: NYogesh Siraswar <yogeshs@ti.com>
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Linux bus numbers should match the numbers defined by the chip
manufacturer. This patch add's spi aliases to achieve that bus
naming convention.
Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
Signed-off-by: NKarthik Tummala <karthik@techveda.org>
Tested-by: NKarthik Tummala <karthik@techveda.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Assign a default parent to mcasp3_ahclkx_mux clock using
the assigned-clock-parents property. This is helpful in
cases like kexec where in the clock parent can be something
other than the value at reset.
Suggested-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Sakari mentioned that some parts of the dts are not needed and do
not have proper documentation, yet.

As the camera works without them, remove them for now.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The USB host has 3 ports so we must specify the entries for each
in the atmel,vbus-gpio property.
The specified pin (PA27) is the vbus for USBB and not USBA.
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Fix typos that prevent proper using of uart2 and uart4 devices.
Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>

There are some changes from the prototype board concerning LEDs and USB
pins:
- USBB power enable and red LED pins are inverted.
- The polarity of LEDs is inverted too.
Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>

When the second display pipeline device nodes for the A31/A31s were
added, it was not known that the TCONs could (through either DRCs)
select either backend as their input. Thus in the endpoints connecting
these components together, the endpoint IDs were set to 0, while in
fact they should have been set to 1.

Cc: <stable@vger.kernel.org>
Fixes: 9a26882a ("ARM: dts: sun6i: Add second display pipeline device
		      nodes")
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

In order to maximize the use of MSI, a PCIe controller will share
all MSI controllers. The patch changes msi-parent to refer to all
MSI controller dts nodes.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

"1" should be replaced by "l". This is a typo.
The patch is to fix it.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

AT91SAM9G45 has an AC97 controller, but it is not described in the dts
file.
This patch adds AC97 node in device tree.
Signed-off-by: NDmitry Rezvanov <dmitry.rezvanov@yandex.ru>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>

Add pinctrl groups of ethenet phy mode, such as "ether_rgmii", "ether_rmii",
and "ether_mii".
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

All registers are located within 0x400 size from the base address.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add UniPhier AIDET (ARM Interrupt Detector) nodes to support
active low interrupts.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Since the discussion is not settled yet for the EMAC, and that the release
in getting really close, let's revert the changes for now, and we'll
reintroduce them later.
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This reverts commit ddb56254. The EMAC
bindings have not stabilized yet, so we can't commit to keeping them
stable.
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This patch solves the following error:
arch/arm/boot/dts/rk3228-evb.dtb: ERROR (phandle_references): Reference to non-existent node or label "phy0"

Fixess db40f15b ("ARM: dts: rk3228-evb: Enable the integrated PHY for gmac")
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add the as3645a flash controller to the DT source.
Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>

CEC support was added for Exynos5 in 4.13, but for the Odroids we need to set
'needs-hpd' as well since CEC is disabled when there is no HDMI hotplug signal,
just as for the exynos4 Odroid-U3.

This is due to the level-shifter that is disabled when there is no HPD, thus
blocking the CEC signal as well. Same close-but-no-cigar board design as the
Odroid-U3.

Tested with my Odroid XU4.
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Rockchip's rv1108-evb board has one usb otg controller and one usb
host controller, each usb controller connect with one usb-phy port
through UTMI+ interface. This patch enables them to support usb on
rv1108-evb board.
Signed-off-by: NFrank Wang <frank.wang@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This patch adds usb otg/host controllers and phys nodes for RV1108 SoCs.
Signed-off-by: NFrank Wang <frank.wang@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

The window of the Aspeed AST2400 SMC Controllers to map chips on the
AHB Bus has a 256MB size. The full window range is

    [ 0x20000000 - 0x2FFFFFFF ] for the FMC controller
    [ 0x30000000 - 0x3FFFFFFF ] for the SPI controller

This change requires CONFIG_VMSPLIT_2G to be set.
Signed-off-by: NCédric Le Goater <clg@kaod.org>
Signed-off-by: NJoel Stanley <joel@jms.id.au>

The cpu is powered by regulator vdd_core on RV1108 evalution
board. Add it to the cpu dt node.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Add cpu opp table for rv1108 to support frequency
from 408MHZ to 1008MHZ.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This adds the operating points to the Ux500 device tree and
deletes the old special-purpose cpufreq node, as we can now
use the generic DT cpufreq driver.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add VPU/VDEC/VOP/IEP iommu nodes
Signed-off-by: NSimon Xue <xxm@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Earlyconsole is used for early kernel debugging that's why this option
shouldn't be enabled by default.
Earlyconsole is partially copying the part of the bootlog after
"bootconsole [uart0] disabled".
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>