Add support for the NAND controller on JZ4740 SoCs.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1470/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There is more work to be done on this but it is basically working now.
Signed-off-by: NJason Roberts <jason.e.roberts@intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This way drivers could use ecc routines without depedency on whole nand
Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This adds a driver for Ricoh R5C852 xD card reader.

This reader is a part of larger mulifunction chip
and found at least in R5C832

Driver is complete, but bewere of the fact that some
(probably only type M) xD cards are 'fake' which means that
they have an on board CPU and expose emulated nand command set

These cards don't even store the  oob area on the flash,
but generate it on the fly from something else.

Thus they demand to have proper values written in the oob area,
and therefore only useful with SmartMedia FTL.
Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This small module implements few helpers that are usefull
for nand drivers for SmartMedia/xD card readers.
Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Adds NAND Flash Controller driver for MPC5121 Revision 2.
All device features, except hardware ECC and power management,
are supported.
Signed-off-by: NPiotr Ziecik <kosmo@semihalf.com>
Signed-off-by: NWolfgang Denk <wd@denx.de>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The ts72xx platform has been updated to use the generic platform nand
driver (plat_nand.c).  This removes the now-defunct ts7250.c nand driver.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Matthieu Crapet <mcrapet@gmail.com>
Cc: Jesse Off <joff@embeddedARM.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The platform has never been fully merged 
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>

Signed-off-by: NLeo Hao Chen <leochen@broadcom.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add w90p910 NAND driver for w90p910 evaluation board
based on w90p910,there is a K8F1G08 NAND on my board.

[dwmw2: depend on MTD_PARTITIONS]
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver is present in the OMAP tree, now pushing it to MTD.

Original author(s):
       Jian Zhang <jzhang@ti.com>
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Cc: Jian Zhang <jzhang@ti.com>
Cc: Artem Bityutskiy <dedekind@infradead.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NIlya Yanok <yanok@emcraft.com>
Acked-by: NWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the integrated NAND flash controller of the
TXx9 family.

Once upon a time there were tx4925ndfmc and tx4938ndfmc driver.  They
were removed due to bitrot in 2005.
This new driver is completely rewritten based on a driver in CELF patch
archive.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Ralf Bächle <ralf@linux-mips.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This is a device driver for the NAND flash controller found on the various
DaVinci family chips.  It handles up to four SoC chipselects, and some
flavors of secondary chipselect (e.g.  based on upper bits of the address
bus) as used with some multichip packages.  (Including the 2 GiB chips
used on some TI devel boards.)

The 1-bit ECC hardware is supported (3 bytes ECC per 512 bytes data); but
not yet the newer 4-bit ECC (10 bytes ECC per 512 bytes data), as
available on chips like the DM355 or OMAP-L137 and needed with the more
error-prone MLC NAND chips.

This is a cleaned-up version of code that's been in use for several years
now; sanity checked with the new drivers/mtd/tests.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The patch adds support for NAND flashes connected to GPIOs.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash.
This driver support SH7723.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the NAND controller commonly found in
TMIO based MFDs.
Signed-off-by: NIan Molton <spyro@f2s.com>
Acked-By: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This was a reference board for which support never got merged upstream.
Kill it off, at rmk's suggestion.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The AT91 NAND driver needs just a few tiny modifications to work on
AVR32 as well. Rename it atmel_nand to reflect this.

Also move the ECC register definitions into drivers/mtd/nand since they
are only useful to the atmel_nand driver, and get rid of the useless
filename at the top of each file.
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is very simple driver, NAND is connected through localbus,
and User-Programmable Machine is doing various adjustments to
speak NAND. No special efforts needed to do read and write cycles,
though to control ALE and CLE phases, we ask UPM to generate exact
pre-programmed signals on the localbus lines.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is preliminary since:

1. It supports only _one_ chip select at the moment. As there is no
   existing platforms available using two chip selects of the NAND
   controller, it shall really not include code for supporting the
   2nd chip select for now, as such code cannot be verified.

2. It resorts to the default and simpliest memory based badblock
   table

3. Only limited types of nand flash are currently supported. Most
   PXA3xx processors come with on-chip NAND flash dies, so there
   isn't much flexibility for other types of NAND.

4. The NAND controller should be configured to detect the device's
   ID, thus making it difficult to use nand_scan_ident() to assist
   the detection process (though it's not impossible)

TODO: fix all the above limitations of cuz :-)
Signed-off-by: Neric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NNick Spence <nick.spence@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Driver for the device bus NAND controller in the Marvell Orion family
of ARM SoCs.
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Acked-by: NJörn Engel <joern@logfs.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Plumbing for NAND connected via localbus on PA Semi PWRficient-based
boards.

From: Egor Martovetsky <egor@pasemi.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is the driver for latest Blackfin on-chip nand flash controller

 - use nand_chip and mtd_info common nand driver interface
 - provide both PIO and dma operation
 - compiled with ezkit bf548 configuration
 - use hardware 1-bit ECC
 - tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs

ChangeLog from try#1
 - use hweight32() instead of count_bits()
 - replace bf54x with bf5xx and BF54X with BF5XX
 - compare against plat->page_size in 2 cases when enable hardware ECC

ChangeLog from try#2
 - passed nand_test suites
 - use cpu_relax() instead of busy wait loop
 - some coding style issue pointed out by Andrew
Signed-off-by: NBryan Wu <bryan.wu@analog.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Unlike most stuff on the market the chip inside these two allows raw
flash access and doesn't implement and FTL, leaving that functionality
to the device driver.

Raw flash access in a cheap USB cardreader!  An MTD test device one can
attach to a PC!  What a deal!

The command set of the chip is not documented, so information was
obtained from the existing mass-storage driver
(drivers/usb/storage/alauda.c), its documentation
(http://alauda.sourceforge.net/wikka.php?wakka=BulkCommandReference),
additional reverse engineering and comparison with a vendor driver for a
related chip
(http://www.ratocsystems.com/english/download/driver/linux/sma03u.html).
Signed-off-by: NJoern Engel <joern@logfs.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This patch adds support for generic platform NAND driver.
Updated after tglx's review/discussion in IRC #mtd channel.
Signed-off-by: NVitaly Wool <vitalywool@gmail.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NSegher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This patch provides MTD support for NAND flash devices on CM-x270 modules.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This is a nand flash driver for the eXcite series of intelligent
cameras manufactured by Basler Vision Technologies AG.
Signed-off-by: NThomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This version only differs from version posted by Savin Zlobec (20 Jun
2006) in that the AT91RM9200-specific chip-select / bus setup code has
been moved from the at91_nand.c driver into the processor-specific file.

From: Savin Zlobec <savin@epico.si>
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

NDFC NAND Flash controller is embedded in PPC EP44x SoCs.
Add platform driver based support.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The patch below adds support for the NAND device on the Amstrad Delta.
This is a 32MiB 8bit Toshiba device, with the data bus connected to the
OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the
Delta's latch2 16bit latch.
Signed-Off-By: NJonathan McDowell <noodles@earth.li>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>