1. 08 5月, 2016 5 次提交
  2. 02 5月, 2016 1 次提交
  3. 04 3月, 2016 1 次提交
    • A
      drm/msm: rename hdmi symbols · fcda50c8
      Arnd Bergmann 提交于
      Global symbols in the kernel should be prefixed by the name
      of the subsystem and/or driver to avoid conflicts when all
      code is built-in.
      
      In this case, function names like 'hdmi_register' or 'hdmi_set_mode'
      are way too generic for an MSM specific DRM driver, so I'm renaming
      them all to msm_hdmi_* here.
      
      I also rename a lot of the 'static' symbols along with the global
      names for consistency, even though those are relatively harmless;
      they might only be slightly confusing when they show up in
      backtraces.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      fcda50c8
  4. 03 3月, 2016 1 次提交
  5. 14 12月, 2015 1 次提交
  6. 24 11月, 2015 1 次提交
  7. 16 8月, 2015 3 次提交
  8. 15 8月, 2015 1 次提交
  9. 30 7月, 2015 1 次提交
  10. 12 6月, 2015 1 次提交
    • R
      drm/msm: fix timeout calculation · 56c2da83
      Rob Clark 提交于
      The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but
      converting this directly to jiffies doesn't take into account the
      initial jiffies count at boot, which may differ from the base time
      of CLOCK_MONOTONIC.
      
      TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that
      instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as
      suggested by Arnd)
      
      v2: switch over from 'struct timespec' to ktime_t throughout, since
      'struct timespec' will be deprecated (as suggested by Arnd)
      v3: minor cosmetic tweaks
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      56c2da83
  11. 02 4月, 2015 1 次提交
  12. 02 2月, 2015 2 次提交
  13. 19 12月, 2014 1 次提交
  14. 18 12月, 2014 1 次提交
    • D
      drm/atomic-helper: Again check modeset *before* plane states · b4274fbe
      Daniel Vetter 提交于
      This essentially reverts
      
      commit 934ce1c2
      Author: Rob Clark <robdclark@gmail.com>
      Date:   Wed Nov 19 16:41:33 2014 -0500
      
          drm/atomic: check mode_changed *after* atomic_check
      
      Depending upon the driver both orders (or maybe even interleaving) is
      required:
      - If ->atomic_check updates ->mode_changed then helper_check_modeset
        must be run afters.
      - If ->atomic_check depends upon accurate adjusted dotclock values for
        e.g. watermarks, then helper_check_modeset must be run first.
      
      The failure mode in the first case is usually a totally angry hw
      because the pixel format switching doesn't happen. The failure mode in
      the later case is usually nothing, since in most cases the old
      adjusted mode from the previous modeset wont be too far off to be a
      problem. So just underruns and perhaps even just suboptimal (from a
      power consumption) watermarks.
      
      Furthermore in the transitional helpers we only call ->atomic_check
      after the new modeset state has been fully set up (and hence
      computed).
      
      Given that asymmetry in expected failure modes I think it's safer to
      go back to the older order. So do that and give msm a special check
      function to compensate.
      
      Also update kerneldoc to explain this a bit.
      
      v2: Actually add the missing hunk Rob spotted.
      
      v3: Move msm_atomic_check into msm_atomic.c, requested by Rob.
      
      Cc: Rob Clark <robdclark@gmail.com>
      Reviewed-by: NRob Clark <robdclark@gmail.com>
      Tested-by: NRob Clark <robdclark@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      b4274fbe
  15. 21 11月, 2014 1 次提交
    • R
      drm/msm/mdp5: use irqdomains · f6a8eaca
      Rob Clark 提交于
      For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
      mdp block.  In order to decouple hdmi/eDP/etc, register an irq domain
      in mdp5.  When hdmi/dsi/etc are used with mdp4, they can directly setup
      their irqs in their DT nodes as normal.  When used with mdp5, instead
      set the mdp device as the interrupt-parent, as in:
      
      	mdp: qcom,mdss_mdp@fd900000 {
      		compatible = "qcom,mdss_mdp";
      		interrupt-controller;
      		#interrupt-cells = <1>;
      		...
      	};
      
      	hdmi: qcom,hdmi_tx@fd922100 {
      		compatible = "qcom,hdmi-tx-8074";
      		interrupt-parent = <&mdp>;
      		interrupts = <8 0>;   /* MDP5_HW_INTR_STATUS.INTR_HDMI */
      		...
      	};
      
      There is a slight awkwardness, in that we cannot disable child irqs
      at the mdp level, they can only be cleared in the child block.  So
      you must not use threaded irq handlers in the child.  I'm not sure
      if there is a better way to deal with that.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      f6a8eaca
  16. 17 11月, 2014 6 次提交
  17. 30 9月, 2014 1 次提交
  18. 24 9月, 2014 1 次提交
  19. 02 6月, 2014 2 次提交
  20. 31 5月, 2014 1 次提交
  21. 31 3月, 2014 1 次提交
  22. 10 1月, 2014 4 次提交
    • R
      drm/msm: add hdmi support for apq8x74/mdp5 · dada25bd
      Rob Clark 提交于
      The HDMI block is basically the same between older SoC's with mdp4
      display controller, and newer ones with mdp5.
      
      So mostly this consists of better abstracting out the different sets of
      regulators, clks, etc.  In particular, for regulators and clks we can
      split it up by what is needed for hot plug detect to work, and what is
      needed to light up the display.
      
      Also, 8x74 has a new phy.. a very simple one, but split out into a
      different mmio space.  And with mdp5, the irq is shared with mdp, so we
      don't directly register our own irq handler.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      dada25bd
    • R
      drm/msm: split out msm_kms.h · dd2da6e3
      Rob Clark 提交于
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      dd2da6e3
    • R
      drm/msm: add support for non-IOMMU systems · 871d812a
      Rob Clark 提交于
      Add a VRAM carveout that is used for systems which do not have an IOMMU.
      
      The VRAM carveout uses CMA.  The arch code must setup a CMA pool for the
      device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
      cool).  The user can configure the VRAM pool size using msm.vram module
      param.
      
      Technically, the abstraction of IOMMU behind msm_mmu is not strictly
      needed, but it simplifies the GEM code a bit, and will be useful later
      when I add support for a2xx devices with GPUMMU, so I decided to keep
      this part.
      
      It appears to be possible to configure the GPU to restrict access to
      addresses within the VRAM pool, but this is not done yet.  So for now
      the GPU will refuse to load if there is no sort of mmu.  Once address
      based limits are supported and tested to confirm that we aren't giving
      the GPU access to arbitrary memory, this restriction can be lifted
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      871d812a
    • R
      drm/msm: COMPILE_TEST support · 3083894f
      Rob Clark 提交于
      With a simple stub, we can get COMPILE_TEST support.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      3083894f
  23. 02 11月, 2013 2 次提交