- 23 9月, 2013 2 次提交
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由 Alex Deucher 提交于
Filter out mclk and sclk levels higher than listed in the clk voltage dependency tables. Supporting these clocks will require additional driver tweaking that isn't supported yet. See bug: https://bugs.freedesktop.org/show_bug.cgi?id=68235Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This patch adds a helper function to fetch the max clock from the voltage clock dependecy tables. Clocks above that level tend to be unstable and will require additional driver tweaks in order to work properly. This patch implemented the helper function to fetch the max clocks from the dependency tables. The following patches implement the per-asic clock filtering. See bug: https://bugs.freedesktop.org/show_bug.cgi?id=68235Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 9月, 2013 1 次提交
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由 Alex Deucher 提交于
Calling force_performance_level() from set_power_state() doesn't work on some asics because the current power state pointer has not been properly updated at that point. Move the calls to force_performance_level() out of the asic specific set_power_state() functions and into the main power state sequence. Fixes dpm resume on SI. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 31 8月, 2013 1 次提交
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由 Alex Deucher 提交于
Check to make sure the dc limits are valid before using them. Some systems may not have a dc limits table. In that case just use the ac limits. This fixes hangs on systems when the power state is changed when on battery (dc) due to invalid performance state parameters. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=68708 v2: fix up limits in dpm_init() Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 08 8月, 2013 2 次提交
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由 Alex Deucher 提交于
Need to check for engine and memory clock ss separately and only enable dynamic ss if either of them are found. This should fix systems which have a ss table, but do not have entries for engine or memory. On those systems we may enable dynamic spread spectrum without enabling it on the engine or memory clocks which can lead to a hang in some cases. fixes some systems reported here: https://bugs.freedesktop.org/show_bug.cgi?id=66963 v2: fix typo Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
On rv770 and newer, clock gating is not required for thermal protection. The only requirement is that the design utilizes a thermal sensor. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 7月, 2013 1 次提交
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 7月, 2013 1 次提交
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由 Alex Deucher 提交于
Allows you to limit the selected power levels via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 7月, 2013 1 次提交
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由 Alex Deucher 提交于
Was disabled due to stability issues on certain boards caused by the a bug in the parsing of the atom mc reg tables. That's fixed now so re-enable. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 6月, 2013 14 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Validate the voltages against the voltage requirements of the dispclk. We currently don't adjust the disp clock so it never changes, but we need to filter out voltage levels that are too low none the less. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
SI uses a new atom table. Required for DPM on SI. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Needed to properly handle dynamic state adjustment. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Needed to properly handle dynamic state adjustment. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Needed to properly handle dynamic state adjustment. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This adds dpm support for cayman asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: fold in tdp fix v3: fix indentation v4: fix 64 bit div v5: attempt to fix state enable Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Alex Deucher 提交于
Use a dedicated copy of the current power state since we may have to adjust it on the fly. v2: fix up redundant state sets Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This adds dpm support for btc asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) Set radeon.dpm=1 to enable. v2: reduce stack usage v3: attempt to fix state enable Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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