Skip to content

cloud-kernel
cloud-kernel

openanolis / cloud-kernel
大约 1 年 前同步成功

通知 158
Star 36
Fork 7
cloud-kernel
cloud-kernel
切换分支/标签
  1. 25 2月, 2010 8 次提交
    • P
      OMAP clock: drop .id field; ensure each clock has a unique name · b92c170d
      由 Paul Walmsley 提交于 
      After the clkdev conversion, the struct clk.id field became
superfluous, so, drop it.  Bring the clock names closer to the TRMs
and ensure they are unique for debugfs.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      b92c170d
    • P
      OMAP clock: compress clock flags down to a u8 · f71eddb1
      由 Paul Walmsley 提交于 
      There are now only eight OMAP clock flags, so renumber the flags to
fit in a u8 and shrink the size of struct clk.flags from a u32 to a
u8.  The intention is to save memory.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      f71eddb1
    • P
      OMAP2 clock: drop CONFIG_PARTICIPANT clock flag · 1a337717
      由 Paul Walmsley 提交于 
      It turns out that the only purpose of the CONFIG_PARTICIPANT clock
flag is to prevent omap2_clk_set_rate() and omap2_clk_set_parent()
from being executed on clocks with that flag set.  The rate-changing
component can be more directly accomplished by dropping the .set_rate
and .round_rate function pointers from those CONFIG_PARTICIPANT struct
clks.  As far as the parent-changing component is concerned, it turns
out that none of the CONFIG_PARTICIPANT clocks have multiple parent
choices, so all that is necessary is for omap2_clk_set_parent() to
bail out early if the new parent is equal to the old parent.
Implement this change and get rid of the flag, which has always had a
confusing name (it appears to be a Kconfig option, falsely).
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
      1a337717
    • P
      OMAP4 clock: drop the CLOCK_IN_OMAP4430 clock flag · c78a05e8
      由 Paul Walmsley 提交于 
      The CLOCK_IN_OMAP4430 clock flag is not currently needed in the OMAP4
ES1 clock tree, and platform discrimination via clock flags is
deprecated in favor of the clkdev mechanism, so, drop it.  (The OMAP4
clock tree autogeneration script has been updated accordingly.)
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
      c78a05e8
    • P
      OMAP2/3/4 clock: fix DPLL multiplier value errors; also copyrights, includes, documentation · 93340a22
      由 Paul Walmsley 提交于 
      The maximum DPLL multiplier (M) values for OMAP2xxx and OMAP3xxx are
one increment higher than they should be.  See for example the
OMAP242x TRM Rev X Section 5.10.6 "Clock Generator Registers" and the
OMAP36xx TRM Rev C Table 3-202 "CM_CLKSEL1_PLL".  Programming a 0 into
the DPLL's M register bitfield is valid for OMAP2/3 and indicates that
the DPLL should enter MN-bypass mode.  Also, increase the minimum
multiplier (M) value for the DPLL rate rounding code from 1 to 2, to
ensure that it does not inadvertently put the DPLL into bypass.

Note that the register documentation in the OMAP2xxx and OMAP3xxx TRMs
does not make clear that the actual DPLL divider value (the "N") is
the content of the appropriate register bitfield for the N value,
_plus one_.  (In other words, an N register bitfield of 0 indicates a
DPLL divider value of 1.)  This is only clearly documented in the
OMAP4430 TRM, in, for example, OMAP4430 TRM Rev A Table 3-1167
"CM_CLKSEL_DPLL_USB".

While here, update copyrights, add kerneldoc for struct dpll_data,
drop the unused struct dpll_data.max_tolerance field, remove some
unnecessary #includes in DPLL-related code, and replace the #include
of <linux/module.h> with <linux/list.h>, which is what was really
needed.  The OMAP4 clock autogenerator script has been updated
accordingly.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
      93340a22
    • V
      OMAP3 clock: Introduce 3630 DPLL4 HSDivider changes · 678bc9a2
      由 Vishwanath BS 提交于 
      Divider (M2, M3, M4, M5 and M6) field width has been increased by 1 bit
in 3630. This patch has changes to accommodate this in CM dynamically
based on chip version.
Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and
M6 and value of these nodes are used if cpu type is 3630.
Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com>
[paul@pwsan.com: updated to apply on 2.6.34 queue; comments added]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      678bc9a2
    • R
      OMAP3 clock: introduce DPLL4 Jtype · 358965d7
      由 Richard Woodruff 提交于 
      DPLL4 for 3630 introduces a changed block called j type dpll, requiring
special divisor bits and additional reg fields. To allow for silicons to
use this, this is introduced as a flag and is enabled for 3630 silicon.
OMAP4 also has j type dpll for usb.

Tested with 3630 ZOOM3 and OMAP3430 ZOOM2
Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NVishwanath BS <Vishwanath.bs@ti.com>
[paul@pwsan.com: added some comments; updated copyrights and credits; fixed
 some style issues]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      358965d7
    • R
      OMAP2/3 clock: Extend find_idlest() to pass back idle state value · 419cc97d
      由 Ranjith Lohithakshan 提交于 
      Current implementation defines clock idle state indicators based on the
cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
manner. This patch extends the find_idlest() function in clkops to pass
back the idle state indicator for that clock, thus allowing idle state
indicators to be defined on a per clock basis if required.

This is specifically needed on AM35xx devices as the new IPSS clocks
indicates the idle status (0 is idle, 1 is ready) in a way just
opposite to how its handled in OMAP3 (0 is ready, 1 is idle).
Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      419cc97d
  3. 16 2月, 2010 1 次提交
  5. 30 1月, 2010 1 次提交
  7. 27 1月, 2010 1 次提交
  9. 09 1月, 2010 1 次提交
    • P
      OMAP clock/CPUFreq: add clk_exit_cpufreq_table() · 4e37c10d
      由 Paul Walmsley 提交于 
      A subsequent patch adds code on OMAP2xxx to dynamically allocate the
CPUFreq frequency table in clk_init_cpufreq_table(), so for it to
avoid a leak, it will need a corresponding function to free the
memory.  This patch adds clk_exit_cpufreq_table() with generic
code to call a chip-specific variant inside the clockfw_lock spinlock via
struct clk_functions.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      4e37c10d
  11. 12 12月, 2009 2 次提交
  13. 21 10月, 2009 1 次提交
    • T
      omap: headers: Move remaining headers from include/mach to include/plat · ce491cf8
      由 Tony Lindgren 提交于 
      Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.

This was done with:

#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"

for header in $headers; do
	old="#include <mach\/$header"
	new="#include <plat\/$header"
	for dir in $omap_dirs; do
		find $dir -type f -name \*.[chS] | \
			xargs sed -i "s/$old/$new/"
	done
	find drivers/ -type f -name \*omap*.[chS] | \
		xargs sed -i "s/$old/$new/"
	for file in $other_files; do
		sed -i "s/$old/$new/" $file
	done
done

for header in $(ls $mach_dir_old/*.h); do
	git mv $header $plat_dir_new/
done
Signed-off-by: NTony Lindgren <tony@atomide.com>
      ce491cf8
  15. 25 7月, 2009 1 次提交
    • P
      OMAP2/3 clock: split, rename omap2_wait_clock_ready() · 72350b29
      由 Paul Walmsley 提交于 
      Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code.  In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:

1. A clkops-specific companion clock return function (by default,
   omap2_clk_dflt_find_companion())

2. A clkops-specific CM_IDLEST register address and bit shift return
   function (by default, omap2_clk_dflt_find_idlest())

3. Code to wait for the CM to indicate that the module is ready
   (omap2_cm_wait_idlest())

Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      72350b29
  17. 29 5月, 2009 1 次提交
  19. 13 5月, 2009 1 次提交
  21. 20 2月, 2009 1 次提交
    • R
      [ARM] omap: add support for bypassing DPLLs · c0bf3132
      由 Russell King 提交于 
      This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.

For both OMAP2 and OMAP3, we note the reference and bypass clocks in
the DPLL data structure.  Whenever we modify the DPLL rate, we first
ensure that both the reference and bypass clocks are enabled.  Then,
we decide whether to use the reference and DPLL, or the bypass clock
if the desired rate is identical to the bypass rate, and program the
DPLL appropriately.  Finally, we update the clock's parent, and then
disable the unused clocks.

This keeps the parents correctly balanced, and more importantly ensures
that the bypass clock is running whenever we reprogram the DPLL.  This
is especially important because the procedure for reprogramming the DPLL
involves switching to the bypass clock.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c0bf3132
  23. 14 2月, 2009 1 次提交
    • R
      [ARM] omap: arrange for clock recalc methods to return the rate · 8b9dbc16
      由 Russell King 提交于 
      linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.

Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8b9dbc16
  25. 09 2月, 2009 14 次提交
  27. 08 2月, 2009 4 次提交
  29. 02 2月, 2009 2 次提交