- 27 9月, 2008 1 次提交
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由 Timur Tabi 提交于
Modify the Freescale Elo / Elo Plus DMA driver so that it can be compiled as a module. The primary change is to stop treating the DMA controller as a bus, and the DMA channels as devices on the bus. This is because the Open Firmware (OF) kernel code does not allow busses to be removed, so although we can call of_platform_bus_probe() to probe the DMA channels, there is no of_platform_bus_remove(). Instead, the DMA channels are manually probed, similar to what fsl_elbc_nand.c does. Cc: Scott Wood <scottwood@freescale.com> Acked-by: NLi Yang <leoli@freescale.com> Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 24 9月, 2008 1 次提交
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由 Timur Tabi 提交于
The Freescale Elo DMA driver runs an internal self-test before registering the channels with the DMA engine. This self-test has a fundemental flaw in that it calls the DMA engine's callback functions directly before the registration. However, the registration initializes some variables that the callback functions uses, namely the device struct. The code works today because there are two device structs: the one created by the DMA engine, and one created by the Open Firmware (OF) subsystem. The self-test currently uses the device struct created by OF. However, in the future, some of the device structs created by OF will be eliminated. This means that the self-test will only have access to the device struct created by the DMA engine. But this device struct isn't initialized when the self-test runs, and this causes a kernel panic. Since there is already a DMA test module (dmatest), the internal self-test code is not useful anyway. It is extremely unlikely that the test will fail in normal usage. It may have been helpful during development, but not any more. Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Li Yang <leoli@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 09 7月, 2008 2 次提交
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由 Haavard Skinnemoen 提交于
A DMA controller capable of doing slave transfers may need to know a few things about the slave when preparing the channel. We don't want to add this information to struct dma_channel since the channel hasn't yet been bound to a client at this point. Instead, pass a reference to the client requesting the channel to the driver's device_alloc_chan_resources hook so that it can pick the necessary information from the dma_client struct by itself. [dan.j.williams@intel.com: fixed up fsldma and mv_xor] Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Li Yang 提交于
Signed-off-by: NLi Yang <leoli@freescale.com> Acked-by: NZhang Wei <zw@zh-kernel.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 18 4月, 2008 4 次提交
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由 Dan Williams 提交于
'ack' is currently a simple integer that flags whether or not a client is done touching fields in the given descriptor. It is effectively just a single bit of information. Converting this to a flags parameter allows the other bits to be put to use to control completion actions, like dma-unmap, and capture results, like xor-zero-sum == 0. Changes are one of: 1/ convert all open-coded ->ack manipulations to use async_tx_ack and async_tx_test_ack. 2/ set the ack bit at prep time where possible 3/ make drivers store the flags at prep time 4/ add flags to the device_prep_dma_interrupt prototype Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
DMA drivers no longer need to be notified of dependency submission events as async_tx_run_dependencies and async_tx_channel_switch will handle the scheduling and execution of dependent operations. [sfr@canb.auug.org.au: extend this for fsldma] Acked-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Zhang Wei 提交于
Split MPC83xx EOCDI event from MPC85xx EOLNI event, which is also need to update cookie and start the next transfer. The DMA channel irq handler function code is refined. The patch is tested on MPC8377MDS board. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by; Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Zhang Wei 提交于
Always enabling the fsl_dma_self_test() to ensure the DMA controller should works well after the driver probed. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 01 4月, 2008 1 次提交
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由 Kumar Gala 提交于
Documentation/powerpc/booting-without-of.txt specifies the compatiables we should bind to for this driver (elo, eloplus). Use these instead of the extremely specific 'mpc8540' and 'mpc8349' compatiables. Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 19 3月, 2008 1 次提交
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由 Zhang Wei 提交于
The DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register) is 0. When the transfer started with a byte count of zero, the DMA controller will triger a PE(programming error) event and halt, not a normal interrupt. I add special codes for PE event and DMA_INTERRUPT async_tx testing. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 14 3月, 2008 3 次提交
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由 Zhang Wei 提交于
The patch 'fsldma: do not cleanup descriptors in hardirq context' (commit 222ccf9a) removed descriptors cleanup function to tasklet but the completed cookie do not updated. Thus, the DMA controller will get lots of duplicated transfer interrupts. Just make a completed cookie update in interrupt handler. And keep other cleanup jobs in tasklet function. Tested-by: NSebastian Siewior <bigeasy@linutronix.de> Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Zhang Wei 提交于
This is a bug that I assigned DMA_INTERRUPT capability to fsldma but missing device_prep_dma_interrupt function. For a bug in dmaengine.c the driver passed BUG_ON() checking. The patch fixes it. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Zhang Wei 提交于
There are warning messages reported by Stephen Rothwell with ARCH=powerpc allmodconfig build: drivers/dma/fsldma.c: In function 'fsl_dma_prep_memcpy': drivers/dma/fsldma.c:439: warning: comparison of distinct pointer types lacks a cast drivers/dma/fsldma.c: In function 'fsl_chan_xfer_ld_queue': drivers/dma/fsldma.c:584: warning: format '%016llx' expects type 'long long unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c: In function 'fsl_dma_chan_do_interrupt': drivers/dma/fsldma.c:668: warning: format '%x' expects type 'unsigned int', but argument 5 has type 'dma_addr_t' drivers/dma/fsldma.c:684: warning: format '%016llx' expects type 'long long unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c:684: warning: format '%016llx' expects type 'long long unsigned int', but argument 5 has type 'dma_addr_t' drivers/dma/fsldma.c:701: warning: format '%02x' expects type 'unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c: In function 'fsl_dma_self_test': drivers/dma/fsldma.c:840: warning: format '%d' expects type 'int', but argument 5 has type 'size_t' drivers/dma/fsldma.c: In function 'of_fsl_dma_probe': drivers/dma/fsldma.c:1010: warning: format '%08x' expects type 'unsigned int', but argument 5 has type 'resource_size_t' This patch fixed the above warning messages. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 05 3月, 2008 2 次提交
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由 Dan Williams 提交于
"Cleaning" descriptors involves calling pending callbacks and clients assume that their callback will only ever happen in softirq context. Delay cleanup to the tasklet. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Acked-by: NZhang Wei <wei.zhang@freescale.com>
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由 Zhang Wei 提交于
The driver implements DMA engine API for Freescale MPC85xx DMA controller, which could be used by devices in the silicon. The driver supports the Basic mode of Freescale MPC85xx DMA controller. The MPC85xx processors supported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on. The MPC83xx(MPC8349, MPC8360) are also supported. [kamalesh@linux.vnet.ibm.com: build fix] [dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25] Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Signed-off-by: NEbony Zhu <ebony.zhu@freescale.com> Acked-by: NKumar Gala <galak@gate.crashing.org> Cc: Shannon Nelson <shannon.nelson@intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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