1. 20 2月, 2015 3 次提交
  2. 17 2月, 2015 1 次提交
  3. 09 2月, 2015 1 次提交
  4. 02 2月, 2015 1 次提交
    • T
      ALSA: pcm: Embed struct device · ef46c7af
      Takashi Iwai 提交于
      Like previous patches, at this time we embed the struct device into
      PCM object.  However, this needs a bit more caution: struct snd_pcm
      doesn't own one device but two, for both playback and capture!  Thus
      not struct snd_pcm but struct snd_pcm_str object contains the device.
      
      Along with this change, pcm->dev field is dropped for avoiding
      confusion.  It was meant to point to a non-standard parent.  But,
      since now we can touch each struct device directly, we can manipulate
      the parent field easily there, too.
      Reviewed-by: NJaroslav Kysela <perex@perex.cz>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      ef46c7af
  5. 15 1月, 2015 1 次提交
  6. 26 12月, 2014 1 次提交
  7. 13 12月, 2014 1 次提交
  8. 14 7月, 2014 1 次提交
    • T
      ALSA: hda - Revert stream assignment order for Intel controllers · cd50065b
      Takashi Iwai 提交于
      We got a regression report for 3.15.x kernels, and this turned out to
      be triggered by the fix for stream assignment order.  On reporter's
      machine with Intel controller (8086:1e20) + VIA VT1802 codec, the
      first playback slot can't work with speaker outputs.
      
      But the original commit was actually a fix for AMD controllers where
      no proper GCAP value is returned, we shouldn't revert the whole
      commit.  Instead, in this patch, a new flag is introduced to determine
      the stream assignment order, and follow the old behavior for Intel
      controllers.
      
      Fixes: dcb32ecd ('ALSA: hda - Do not assign streams in reverse order')
      Reported-and-tested-by: NSteven Newbury <steve@snewbury.org.uk>
      Cc: <stable@vger.kernel.org> [v3.15+]
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      cd50065b
  9. 27 6月, 2014 3 次提交
  10. 25 6月, 2014 1 次提交
  11. 30 4月, 2014 1 次提交
    • T
      ALSA: hda - Suppress CORBRP clear on Nvidia controller chips · 6ba736dd
      Takashi Iwai 提交于
      The recent commit (ca460f86) changed the CORB RP reset procedure to
      follow the specification with a couple of sanity checks.
      Unfortunately, Nvidia controller chips seem not following this way,
      and spew the warning messages like:
        snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0
      
      This patch adds the workaround for such chips.  It just skips the new
      reset procedure for the known broken chips.
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      6ba736dd
  12. 09 4月, 2014 2 次提交
  13. 08 4月, 2014 1 次提交
  14. 03 3月, 2014 1 次提交
  15. 01 3月, 2014 8 次提交