- 01 11月, 2011 1 次提交
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由 Arnd Bergmann 提交于
The module.h cleanup series is not merged at this point, so use the older header file for now, to make it build either way. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 31 10月, 2011 9 次提交
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由 Rob Herring 提交于
Add the platform suspend ops for highbank. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Martin Bogomolni 提交于
This adds cpu hotplug for highbank. On highbank, a core is always reset and boots up the same path as a cold boot. Signed-off-by: NMartin Bogomolni <martin@calxeda.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Rob Herring 提交于
This enables SMP support on highbank processor. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Rob Herring 提交于
This adds basic support for the Calxeda Highbank platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Rob Herring 提交于
This adds the devicetree source and documentation for the Calxeda highbank platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Rob Herring 提交于
Add empty version of l2x0_of_init for when CONFIG_CACHE_L2X0 is not selected. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NBarry Song <21cnbao@gmail.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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由 Rob Herring 提交于
Commit "ARM: gic: add irq_domain support" (b49b6ff) breaks SPARSE_IRQ on platforms with GIC. When SPARSE_IRQ is enabled, all NR_IRQS or mach_desc->nr_irqs will be allocated by arch_probe_nr_irqs(). This caused irq_alloc_descs to allocate irq_descs after the pre-allocated space. Make irq_alloc_descs search for an exact irq range and assume it has been pre-allocated on failure. For DT probing dynamic allocation is used. DT enabled platforms should set their nr_irqs to NR_IRQ_LEGACY and have all irq_chips allocate their irq_descs with irq_alloc_descs if SPARSE_IRQ is enabled. gic_init irq_start param is changed to be signed with negative meaning do dynamic Linux irq assigment. Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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由 Rob Herring 提交于
This adds ARM gic interrupt controller initialization using device tree data. The initialization function is intended to be called by of_irq_init function like this: const static struct of_device_id irq_match[] = { { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, {} }; static void __init init_irqs(void) { of_irq_init(irq_match); } Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Tested-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Rob Herring 提交于
Convert the gic interrupt controller to use irq domains in preparation for device-tree binding and MULTI_IRQ. This allows for translation between GIC interrupt IDs and Linux irq numbers. The meaning of irq_offset has changed. It now is just the number of skipped GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32 for secondary GICs. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Tested-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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- 25 10月, 2011 2 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
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由 Nicolas Ferre 提交于
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
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- 24 10月, 2011 1 次提交
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由 Takashi Iwai 提交于
Commit 4b239f45 ("x86-64, mm: Put early page table high") causes a S4 regression since 2.6.39, namely the machine reboots occasionally at S4 resume. It doesn't happen always, overall rate is about 1/20. But, like other bugs, once when this happens, it continues to happen. This patch fixes the problem by essentially reverting the memory assignment in the older way. Signed-off-by: NTakashi Iwai <tiwai@suse.de> Cc: <stable@kernel.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Yinghai Lu <yinghai.lu@oracle.com> [ We'll hopefully find the real fix, but that's too late for 3.1 now ] Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 10月, 2011 2 次提交
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由 Marc Zyngier 提交于
This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 22 10月, 2011 1 次提交
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由 Domenico Andreoli 提交于
v2: - register_syscore_ops(&s3c24xx_irq_syscore_ops) does not need to be conditionally compiled out, it is already optimized out on !CONFIG_PM - fix also s3c2412 and s3c2416 affected by the same build issue v1: s3c2440.c fails to build if !CONFIG_PM because in such case s3c2410_pm_syscore_ops is not defined. Same error should happen also in s3c2410.c and s3c2442.c Signed-off-by: NDomenico Andreoli <cavokz@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 21 10月, 2011 2 次提交
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由 Marek Szyprowski 提交于
Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Russell King 提交于
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 10月, 2011 1 次提交
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由 Kjetil Oftedal 提交于
Currently no type of alignment is specified for PCI expansion roms while parsing the openfirmware tree. This causes calls to pci_map_rom() to fail. IORESOURCE_SIZEALIGN is the default alignment used for rom resouces in pci/probe.c, and has been verified to work with various cards on a ultra 10. Signed-off-By: NKjetil Oftedal <oftedal@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 10月, 2011 2 次提交
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由 Shawn Guo 提交于
It adds device tree support for imx51 babbage board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Shawn Guo 提交于
It adds device tree support for imx53 boards. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 17 10月, 2011 16 次提交
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由 Barry Song 提交于
we save the l2x0 registers at the first initialization, and platform codes can get them to restore l2x0 status after wakeup. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Barry Song 提交于
this patch fixes the error in Rob Herring's ARM: 7009/1: l2x0: Add OF based initialization http://www.spinics.net/lists/arm-kernel/msg131123.html it has been in rmk/for-next with commit 41c86ff5b Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NRob Herring <robherring2@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Barry Song 提交于
using cpu_relax in busy loops is a well-known idiom in the kernel. It's more for documentation purposes than technically needed here. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rob Herring 提交于
This adds probing for ARM L2x0 cache controllers via device tree. Support includes the L210, L220, and PL310 controllers. The binding allows setting up cache RAM latencies and filter addresses (PL310 only). Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NBarry Song <21cnbao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless a hardware debugger is listening to the debug comms. channel. This patch adds a dummy UART option as the default DEBUG_LL choice which requires the platform to do the right thing. Acked-by: NStephen Boyd <sboyd@codeaurora.org> Tested-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
DEBUG_ICEDCC support is just another DEBUG_LL choice and selecting it along with other DEBUG_LL options doesn't make much sense. Put it into the DEBUG_LL choice to avoid confusion. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
ARM patch 7072/1 (debug: use kconfig choice for selecting DEBUG_LL UART) didn't notice that the Kconfigs relied on being unselected to configure a different serial port. Since there is no NONE option in a choice menu, explicitly add the other option so that both serial ports can be selected. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Enabled DEBUG_LL hardcodes the UART address into the kernel and results in a non-portable kernel image. Since this option is only intended for use when debugging early boot failures, supporting multiple platforms in such a configuration is not the intended use-case. This patch documents this limitation in the DEBUG_LL Kconfig help text, so that users are aware of the portability restrictions that are associated with enabling low-level debugging support. Reported-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Enabling CONFIG_DEBUG_LL (which is required for earlyprintk) hardwires the debug UART address into the kernel, so that we can print before the platform is initialised. If the user inadvertently selects multiple platforms with DEBUG_LL enabled, the UART address may not be correct and will likely cause the kernel to hang in the very early stages of boot. This patch, based on a skeleton from Russell, uses a Kconfig choice for selecting the DEBUG_LL UART, therefore allowing the user to make a choice about the supported platform when DEBUG_LL is enabled. Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jamie Iles 提交于
The definition of __exception_irq_entry for CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a circular dependency with it's current home in asm/system.h. Create asm/exception.h and update all current users. v4: - rebase to rmk/for-next v3: - remove redundant includes of linux/ftrace.h v2: - document the usage restricitions of __exception* Cc: Zoltan Devai <zdevai@gmail.com> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
In order to be able to handle localtimer directly from C code instead of assembly code, introduce handle_local_timer(), which is modeled after handle_IRQ(). Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
In order to be able to handle IPI directly from C code instead of assembly code, introduce handle_IPI(), which is modeled after handle_IRQ(). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes, SCU needs to be re-enabled. This patch removes __init annotation from function scu_enable(), so that platform resume procedure can call it to re-enable SCU. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
The GIC driver must convert logical CPU numbers passed in from Linux into physical CPU numbers that are understood by the hardware. This patch uses the new cpu_logical_map macro for performing the conversion inside the GIC driver. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
To allow booting Linux on a CPU with physical ID != 0, we need to provide a mapping from the logical CPU number to the physical CPU number. This patch adds such a mapping and populates it during boot. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Vincent Guittot 提交于
The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: NVincent Guittot <vincent.guittot@linaro.org> Reviewed-by: NAmit Kucheria <amit.kucheria@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 10月, 2011 3 次提交
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由 Zoltan Devai 提交于
This is unneeded and causes an abort on the SPMP8000 platform. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NZoltan Devai <zoss@devai.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: NAlasdair Grant <alasdair.grant@arm.com> Reported-by: NMatt Horsnell <matt.horsnell@arm.com> Reported-by: NMichael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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