1. 19 6月, 2017 2 次提交
  2. 13 6月, 2017 1 次提交
  3. 07 6月, 2017 1 次提交
    • V
      drm/i915: Workaround VLV/CHV DSI scanline counter hardware fail · 8f4d3809
      Ville Syrjälä 提交于
      The scanline counter is bonkers on VLV/CHV DSI. The scanline counter
      increment is not lined up with the start of vblank like it is on
      every other platform and output type. This causes problems for
      both the vblank timestamping and atomic update vblank evasion.
      
      On my FFRD8 machine at least, the scanline counter increment
      happens about 1/3 of a scanline ahead of the start of vblank (which
      is where all register latching happens still). That means we can't
      trust the scanline counter to tell us whether we're in vblank or not
      while we're on that particular line. In order to keep vblank
      timestamping in working condition when called from the vblank irq,
      we'll leave scanline_offset at one, which means that the entire
      line containing the start of vblank is considered to be inside
      the vblank.
      
      For the vblank evasion we'll need to consider that entire line
      to be bad, since we can't tell whether the registers already
      got latched or not. And we can't actually use the start of vblank
      interrupt to get us past that line as the interrupt would fire
      too soon, and then we'd up waiting for the next start of vblank
      instead. One way around that would using the frame start
      interrupt instead since that wouldn't fire until the next
      scanline, but that would require some bigger changes in the
      interrupt code. So for simplicity we'll just poll until we get
      past the bad line.
      
      v2: Adjust the comments a bit
      
      Cc: stable@vger.kernel.org
      Cc: Jonas Aaberg <cja@gmx.net>
      Tested-by: NJonas Aaberg <cja@gmx.net>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99086Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161215174734.28779-1-ville.syrjala@linux.intel.comTested-by: NMika Kahola <mika.kahola@intel.com>
      Reviewed-by: NMika Kahola <mika.kahola@intel.com>
      (cherry picked from commit ec1b4ee2)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      8f4d3809
  4. 29 5月, 2017 1 次提交
  5. 26 4月, 2017 1 次提交
  6. 07 4月, 2017 1 次提交
  7. 06 4月, 2017 1 次提交
    • D
      drm/fb-helper: Give up on kgdb for atomic drivers · 9c79e0b1
      Daniel Vetter 提交于
      It just doesn't work. It probably stopped working way, way before that
      (e.g. i915 grabbed random mutexes all over in modeset code at least
      since gen6), but with atomic and all the ww_mutex stuff it's indeed
      hopeless.
      
      Remove ->mode_set_base_atomic from the 2 atomic drivers (i915 and
      nouveau) that still had one (both had dummy implementations already
      anyway), and shunt atomic drivers in the helpers debug_enter/leave
      functions.
      
      I'll leave the code in for radeon and amdgpu, but I think as soon as
      amdgpu is atomic we should think about just ripping it out. Only
      having it around for radeon and pre-nv50 is rather pointless. This
      would also allow us to nuke all that code from fbdev.
      
      Funny part is that _all_ kms drivers set this hook, despite that no
      one else provides the required ->mode_set_base_atomic implementation.
      
      The reason I'm jumping on this is that I want to wire up a full
      acquire ctx for the benefit of atomic drivers, everywhere. And the
      debug_enter/leave implementations call ->gamma_set. And there's just
      no way ever we can create an acquire_ctx in the nmi context of kgdb.
      
      Cc: Ben Skeggs <bskeggs@redhat.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Acked-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170403083304.9083-11-daniel.vetter@ffwll.ch
      9c79e0b1
  8. 05 4月, 2017 2 次提交
  9. 30 3月, 2017 2 次提交
  10. 29 3月, 2017 2 次提交
  11. 28 3月, 2017 3 次提交
  12. 27 3月, 2017 6 次提交
  13. 23 3月, 2017 3 次提交
  14. 17 3月, 2017 2 次提交
  15. 16 3月, 2017 1 次提交
  16. 14 3月, 2017 2 次提交
  17. 13 3月, 2017 1 次提交
  18. 09 3月, 2017 6 次提交
  19. 08 3月, 2017 2 次提交