Add a full sc9836-uart driver for SC9836 SoC which is based on the
spreadtrum sharkl64 platform.
This driver also support earlycon.
Originally-by: NLanqing Liu <lanqing.liu@spreadtrum.com>
Signed-off-by: NOrson Zhai <orson.zhai@spreadtrum.com>
Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NPeter Hurley <peter@hurleysoftware.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Some of FSL SoCs like T1040 has new version of UART controller which
can support 64byte FiFo.
To enable 64 byte support, following needs to be done:
-FCR[EN64] needs to be programmed to 1 to enable it.
-Also, when FCR[EN64]==1, RTL bits to be used as below
to define various Receive Trigger Levels:
        -FCR[RTL] = 00  1 byte
        -FCR[RTL] = 01  16 bytes
        -FCR[RTL] = 10  32 bytes
        -FCR[RTL] = 11  56 bytes
-tx_loadsz is set to 63-bytes instead of 64-bytes to implement
 workaround of errata A-008006 which states that tx_loadsz should
 be configured less than Maximum supported fifo bytes
Signed-off-by: NVijay Rai <vijay.rai@freescale.com>
Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Ralink RT2880 SoC and its successors have an internal 8250 core. This core
needs the same quirks applied as the AMD AU1xxx uart. In addition to these
quirks, the ports memory region is only 0x100 unlike the AU1xxx which has a
size of 0x1000.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The SoC has four fully functional UARTs which use the same programming
model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On)
which cannot be powered off.
Signed-off-by: NCarlo Caione <carlo@caione.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The SC16IS7xx is a slave I2C-bus/SPI interface to a single-channel
high performance UART. The SC16IS7xx's internal register set is
backward-compatible with the widely used and widely popular 16C450.

The SC16IS7xx also provides additional advanced features such as
auto hardware and software flow control, automatic RS-485 support, and
software reset.
Signed-off-by: NJon Ringle <jringle@gridpoint.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add driver for MEN's 16z135 High Speed UART.

The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte
deep FIFO buffers for the RX and TX path. It also has configurable FIFO
fill level IRQs and data copied to and from the hardware has to be
acknowledged.
Signed-off-by: NJohannes Thumshirn <johannes.thumshirn@men.de>
Reviewed-by: NAlan Cox <gnomes@lxorguk.ukuu.org.uk>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Zynq's UART is Cadence IP. Make this visible in the prompt in kconfig
and additional comments in the driver.
This also renames functions and symbols, as far as possible without
breaking user space API, to reflect the Cadence origin. This is achieved
through simple search and replace:
 - s/XUARTPS/CDNS_UART/g
 - s/xuartps/cdns_uart/g
The only exceptions are PORT_XUARTPS and the driver name, which stay as is,
due to their exposure to user space. As well as the - no legacy -
compatibility string 'xlnx,xuartps'
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.

ASC is embedded in ST COMMS IP block. It supports Rx & Tx functionality.
It support all industry standard baud rates.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Adds support for "High Speed Serial Communications Interface with FIFO",
essentially a SCIF with 128-byte FIFOs and more accurate baud rate
generator.
Signed-off-by: NUlrich Hecht <ulrich.hecht@gmail.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add Freescale lpuart driver support. The lpuart device
can be found on Vybrid VF610 and Layerscape LS-1 SoCs.
Signed-off-by: NJingchang Lu <b35083@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add support for Altera 8250/16550 compatible serial port.
Signed-off-by: NLey Foon Tan <lftan@altera.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

It was mistakenly defined to be 24 instead of the next higher number 25.
Reported-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Stephen Hurd <shurd@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Cc: stable <stable@vger.kernel.org>  # 3.8
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This driver supports the RocketPort EXPRESS and RocketPort INFINITY
families of PCI/PCIe multiport serial adapters.  These adapters use a
"RocketPort 2" ASIC that is not compatible with the original RocketPort
driver (CONFIG_ROCKETPORT).

Tested with the RocketPort EXPRESS Octa DB9 and Quad DB9.  Also added an
old RocketPort 8J PCI card to the same system to verify that rocket.c and
rp2.c coexist peacefully.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add support for the UART device present in Broadcom TruManage capable
NetXtreme chips (ie: 5761m 5762, and 5725).

This implementation has a hidden transmit FIFO, so running in single-byte
interrupt mode results in too many interrupts.  The UART_CAP_HFIFO
capability was added to track this.  It continues to reload the THR as long
as the THRE and TSRE bits are set in the LSR up to a specified limit (1024
is used here).
Signed-off-by: NStephen Hurd <shurd@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add support for new devices: Exar's XR17V35x family of multi-port PCIe UARTs.
Signed-off-by: NMatt Schulte <matts@commtech-fastcom.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Driver for non-standard on-chip UART, instantiated in the ARC (Synopsys)
FPGA Boards such as ARCAngel4/ML50x
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NMichael Kerrisk <mtk.manpages@gmail.com>
Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: NDave Jones <davej@redhat.com>