- 16 3月, 2012 1 次提交
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由 Liu Gang 提交于
For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some relocation errors while using the corenet64_smp_defconfig: WARNING: modpost: Found 6 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o LD .tmp_vmlinux1 arch/powerpc/sysdev/built-in.o:(__ex_table+0x0): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208 arch/powerpc/sysdev/built-in.o:(__ex_table+0x2): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup' arch/powerpc/sysdev/built-in.o:(__ex_table+0x4): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230 arch/powerpc/sysdev/built-in.o:(__ex_table+0x6): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c arch/powerpc/sysdev/built-in.o:(__ex_table+0x8): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250 arch/powerpc/sysdev/built-in.o:(__ex_table+0xa): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18 Rewrote the corresponding code with the support of 64bit building. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 27 2月, 2012 1 次提交
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由 Benjamin Herrenschmidt 提交于
When using a multi-ISU MPIC, we can interrupts up to isu_size * MPIC_MAX_ISU, not just isu_size, so allocate the right size reverse map. Without this, the code will constantly fallback to a linear search. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 23 2月, 2012 5 次提交
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由 Kyle Moffett 提交于
There are two separate flags controlling whether or not the MPIC is reset during initialization, which is completely unnecessary, and only one of them can be specified in the device tree. Also, most platforms in-tree right now do actually want to reset the MPIC during initialization anyways, which means lots of duplicate code passing the MPIC_WANTS_RESET flag. Fix all of the callers which currently do not pass the MPIC_WANTS_RESET flag to pass the MPIC_NO_RESET flag, then remove the MPIC_WANTS_RESET flag and make the code reset the MPIC by default. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The FreeScale PowerQUICC-III-compatible (mpc85xx/mpc86xx) MPICs do not correctly report the number of hardware interrupt sources, so software needs to override the detected value with "256". To avoid needing to write custom board-specific code to detect that scenario, allow it to be easily overridden in the device-tree. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The mpic->irq_count variable is only used as a software error-checking limit to determine whether or not an IRQ number is valid. In board code which does not manually specify an IRQ count to mpic_alloc(), i.e. 0, it is automatically detected from the number of ISUs and the ISU size. In practice, all hardware ends up with irq_count == num_sources, so all of the runtime checks on mpic->irq_count should just check the value of mpic->num_sources instead. When platform hardware does not correctly report the number of IRQs, which only happens on the MPC85xx/MPC86xx, the MPIC_BROKEN_FRR_NIRQS flag is used to override the detected value of num_sources with the manual irq_count parameter. Since there's no need to manually specify the number of IRQs except in this case, the extra flag can be eliminated and the test changed to "irq_count != 0". Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The Freescale MPIC (and perhaps others in the future) is incapable of routing non-IPI interrupts to more than once CPU at a time. Currently all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to mpic_alloc(), but that information should really be present in the device-tree. Older board code can't rely on the device-tree having the property set, but newer platforms won't need it manually specified in the code. [BenH: Remove unrelated changes, folded in a different patch] Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The mpic_alloc() function takes a "flags" parameter and assigns it into the mpic->flags variable fairly early on, but several later pieces of code detect various device-tree properties and save them into the "mpic->flags" variable (EG: "big-endian" => MPIC_BIG_ENDIAN). Unfortunately, a number of codepaths (including several which test the flag MPIC_BIG_ENDIAN!) test "flags" instead of "mpic->flags", and get wrong answers as a result. Consolidate the device-tree flag tests early in mpic_alloc() and change all of the checks after "mpic->flags" is init'ed to use "mpic->flags". [BenH: Fixed up use of mpic->node before it's initialized] Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 16 2月, 2012 1 次提交
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由 Benjamin Herrenschmidt 提交于
Upstream changes to the way PHB resources are registered broke the resource fixup for FSL boards. We can no longer rely on the resource pointer array for the PHB's pci_bus structure, so let's leave it alone and go straight for the PHB resources instead. This also makes the code generally more readable. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 18 1月, 2012 1 次提交
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由 Julia Lawall 提交于
Add missing iounmap in error handling code, in a case where the function already preforms iounmap on some other execution path. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; statement S,S1; int ret; @@ e = \(ioremap\|ioremap_nocache\)(...) ... when != iounmap(e) if (<+...e...+>) S ... when any when != iounmap(e) *if (...) { ... when != iounmap(e) return ...; } ... when any iounmap(e); // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 05 1月, 2012 4 次提交
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由 Timur Tabi 提交于
Add support for vmpic-msi nodes to the fsl_msi driver. The MSI is virtualized by the hypervisor, so the vmpic-msi does not contain a 'reg' property. Instead, the driver uses hcalls. Add support for the "msi-address-64" property to the fsl_pci driver. The Freescale hypervisor typically puts the virtualized MSIIR register in the page after the end of DDR, so we extend the DDR ATMU to cover it. Any other location for MSIIR is not supported, for now. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Julia Lawall 提交于
rmu needs to be freed before leaving the function in an error case. A simplified version of the semantic match that finds the problem is as follows: (http://coccinelle.lip6.fr) // <smpl> @r exists@ local idexpression x; statement S; identifier f1; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } x->f1 ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
Integrated Flash Controller supports various flashes like NOR, NAND and other devices using NOR, NAND and GPCM Machine available on it. IFC supports four chip selects. Signed-off-by: NDipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NLiu Shuo <b35362@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
There is an issue on FSL-BookE 64-bit devices (P5020) in which PCIe devices that are capable of doing 64-bit DMAs (like an Intel e1000) do not function and crash the kernel if we have >4G of memory in the system. The reason is that the existing code only sets up one inbound window for access to system memory across PCIe. That window is limited to a 32-bit address space. So on systems we'll end up utilizing SWIOTLB for dma mappings. However SWIOTLB dma ops implement dma_alloc_coherent() as dma_direct_alloc_coherent(). Thus we can end up with dma addresses that are not accessible because of the inbound window limitation. We could possibly set the SWIOTLB alloc_coherent op to swiotlb_alloc_coherent() however that does not address the issue since the swiotlb_alloc_coherent() will behave almost identical to dma_direct_alloc_coherent() since the devices coherent_dma_mask will be greater than any address allocated by swiotlb_alloc_coherent() and thus we'll never bounce buffer it into a range that would be dma-able. The easiest and best solution is to just make it so that a 64-bit capable device is able to DMA to any internal system address. We accomplish this by opening up a second inbound window that maps all of memory above the internal SoC address width so we can set it up to access all of the internal SoC address space if needed. We than fixup the dma_ops and dma_offset for PCIe devices with a dma mask greater than the maximum internal SoC address. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 04 1月, 2012 1 次提交
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由 Al Viro 提交于
Move invalidate_bdev, block_sync_page into fs/block_dev.c. Export kill_bdev as well, so brd doesn't have to open code it. Reduce buffer_head.h requirement accordingly. Removed a rather large comment from invalidate_bdev, as it looked a bit obsolete to bother moving. The small comment replacing it says enough. Signed-off-by: NNick Piggin <npiggin@suse.de> Cc: Al Viro <viro@ZenIV.linux.org.uk> Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 22 12月, 2011 3 次提交
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由 Kay Sievers 提交于
The sysdev.h file should not be needed by any in-kernel code, so remove the .h file from these random files that seem to still want to include it. The sysdev code will be going away soon, so this include needs to be removed no matter what. Cc: Jiandong Zheng <jdzheng@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: "Venkatesh Pallipadi Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Matthew Garrett <mjg@redhat.com> Signed-off-by: NKay Sievers <kay.sievers@vrfy.org>
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由 Kay Sievers 提交于
After all sysdev classes are ported to regular driver core entities, the sysdev implementation will be entirely removed from the kernel. Cc: Timur Tabi <timur@freescale.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Kay Sievers 提交于
This moves the 'cpu sysdev_class' over to a regular 'cpu' subsystem and converts the devices to regular devices. The sysdev drivers are implemented as subsystem interfaces now. After all sysdev classes are ported to regular driver core entities, the sysdev implementation will be entirely removed from the kernel. Userspace relies on events and generic sysfs subsystem infrastructure from sysdev devices, which are made available with this conversion. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Borislav Petkov <bp@amd64.org> Cc: Tigran Aivazian <tigran@aivazian.fsnet.co.uk> Cc: Len Brown <lenb@kernel.org> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Dave Jones <davej@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 13 12月, 2011 1 次提交
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由 Grant Likely 提交于
A large chunk of qe_pin_request() is unnecessarily cut-and-paste directly from of_get_named_gpio_flags(). This patch cuts out the duplicate code and replaces it with a call to of_get_gpio(). v2: fixed compile error due to missing gpio_to_chip() Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@kernel.crashing.org>
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- 09 12月, 2011 4 次提交
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由 Tony Breeds 提交于
Based on original work by David 'Shaggy' Kleikamp. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
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由 Tony Breeds 提交于
Needed if you want to use swiotlb, harmless otherwise. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
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由 Tony Breeds 提交于
Currituck doesn't need nor use SDR so aborting the pci setup if there is no sdr-base would be bad. Add a flag to ppc4xx_pciex_hwops for the backends to state if they need SDR and then only complain and abort if they do and it's not found in the device tree. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
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由 Tony Breeds 提交于
Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
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- 08 12月, 2011 1 次提交
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由 Anton Blanchard 提交于
I have an intermittent kdump fail where the hypervisor fails an H_EOI. As a result our CPPR is never reset to 0xff and we no longer accept interrupts. This patch calls icp_hv_set_cppr to reset the CPPR if H_EOI fails, fixing the kdump fail. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 07 12月, 2011 9 次提交
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由 Kyle Moffett 提交于
The Cell and PowerMac platforms use virtually identical cascaded-IRQ setup code, so just merge it into the core. Ideally this code would trigger automatically when an MPIC device-node specifies an "interrupts" property, perhaps even enabling MPIC_SECONDARY along the way. Unfortunately, Benjamin Herrenschmidt has had bad experiences in the past with the quality of Apple PowerMac device-trees, so to be safe we will only try to parse out an IRQ if the MPIC_SECONDARY flag is set by the caller. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
Store the node pointer in the MPIC during initialization so that all of the later operational code can just reuse the cached pointer. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
There's not really any reason to have this one-liner in a separate static inline function, given that all the other similar tests are already in the alloc_mpic() code. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
Don't open-code the OpenFirmware "dcr-reg" property lookup trying to map DCR resources. This makes the code a bit easier to read. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
It turns out that there are only 2 in-tree platforms which use MPICs which are not "primary": IBM Cell and PowerMac. To reduce the complexity of the typical board setup code, invert the MPIC_PRIMARY bit into MPIC_SECONDARY. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
Almost all PowerPC platforms use a standard "open-pic" device node so the mpic_alloc() function now accepts NULL for the device-node. This will cause it to perform a default search with of_find_matching_node(). Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The MPIC code can already perform an automatic OF address translation step as part of mpic_alloc(), but several boards need to use that base address when they perform mpic_assign_isu(). The easiest solution is to save the computed physical address into the "struct mpic" for later use by the board code. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
All of the existing callers of mpic_alloc() pass in a non-NULL device-node pointer, so the checks for a NULL device-node may be removed. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
Instead of using the open-coded "reg" property lookup and address translation in mpic_alloc(), directly call of_address_to_resource(). This includes various workarounds for special cases which the naive of_address_translate() does not. Afterwards it is possible to remove the copiously copy-pasted calls to of_address_translate() from the 85xx/86xx/powermac platforms. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 28 11月, 2011 1 次提交
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由 Anton Blanchard 提交于
During kdump stress testing I sometimes see the kdump kernel panic with: Interrupt 0x306 (real) is invalid, disabling it. Kernel panic - not syncing: bad return code EOI - rc = -4, value=ff000306 Instead of panicing print the error message, dump the stack the first time it happens and continue on. Add some more information to the debug messages as well. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 25 11月, 2011 2 次提交
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由 Justin P. Mattock 提交于
The patch below removes an extra semicolon. Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com> CC: linuxppc-dev@lists.ozlabs.org CC: Paul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Thomas Gleixner 提交于
IPI handlers cannot be threaded. Remove the obsolete IRQF_DISABLED flag (see commit e58aa3d2) while at it. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 11月, 2011 5 次提交
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由 Timur Tabi 提交于
On Freescale parts with multiple MSI controllers, the controllers are combined into one "pool" of interrupts. Whenever a device requests an MSI interrupt, the next available interrupt from the pool is selected, regardless of which MSI controller the interrupt is from. This works because each PCI bus has an ATMU to all of CCSR, so any PCI device can access any MSI interrupt register. The fsl,msi property is used to specify that a given PCI bus should only use a specific MSI device. This is necessary, for example, with the Freescale hypervisor, because the MSI devices are assigned to specific partitions. Ideally, we'd like to be able to assign MSI devices to PCI busses within the MSI or PCI layers. However, there does not appear to be a mechanism to do that. Whenever the MSI layer wants to allocate an MSI interrupt to a PCI device, it just calls arch_setup_msi_irqs(). It would be nice if we could register an MSI device with a specific PCI bus. So instead we remember the phandles of each MSI device, and we use that to limit our search for an available interrupt. Whenever we are asked to allocate a new interrupt for a PCI device, we check the fsl,msi property of the PCI bus for that device. If it exists, then as we are looping over all MSI devices, we skip the ones that don't have a matching phandle. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jia Hongtao 提交于
Power supply for LBC registers is off when system go to deep-sleep state. We save the values of registers before suspend and restore to registers after resume. We removed the last two reservation arrays from struct fsl_lbc_regs for allocating less memory and minimizing the memcpy size. Signed-off-by: NJiang Yutang <b14898@freescale.com> Signed-off-by: NJia Hongtao <B38951@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Liu Gang 提交于
Usually, freescale rapidio endpoint can support one or two 1x or 4X LP-Serial link interfaces, and rapidio message transactions can be implemented by two message units. This adds the support of two rapidio ports and initializes message unit 0 and message unit 1. And these ports and message units can work simultaneously. Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NJin Qing <b24347@freescale.com> Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Acked-by: NAlexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Liu Gang 提交于
The Freescale PowerPC RapidIO controller consists of a RapidIO endpoint and a RapidIO message unit(RMU). Or use RapidIO message manager(RMan) to replace the RMU in DPAA architecture. Therefore, we should split the code into two function modules according to the hardware architecture. Add new struct for RMU module, and new initialization function to set up RMU module. This policy is very conducive to adding new module like RMan, or adding multi-ports or message units support. Signed-off-by: NLian Minghuan <Minghuan.Lian@freescale.com> Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Acked-by: NAlexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Julia Lawall 提交于
At this point, ehv_pic has been allocated but not stored anywhere, so it should be freed before leaving the function. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @exists@ local idexpression x; statement S,S1; expression E; identifier fl; expression *ptr != NULL; @@ x = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...kfree(x)...+> } when any when != true x == NULL x->fl ...> ( if (x == NULL) S1 | if (...) { ... when != x when forall ( return \(0\|<+...x...+>\|ptr\); | * return ...; ) } ) // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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