- 17 7月, 2010 14 次提交
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由 Simon Guinot 提交于
Signed-off-by: NSimon Guinot <sguinot@lacie.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Saeed Bishara 提交于
This patch extends the kirkwood's PCIe support up to 2 controllers as in the 6282 devices. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Saeed Bishara 提交于
The 6282 SoC is compatible to 6280 and features faster CPU, DDR3, additional PCIe interface, and LCD controller. More information can be found here: http://www.marvell.com/products/processors/embedded/armada_300/armada_310.pdfSigned-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Saeed Bishara 提交于
In case the board is configured to boot from spi flash, the mpps will not be configured to select the NAND I/Os. This patch makes sure to select the NAND I/O's regardless to the boot device type. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Dmytro Milinevskyy 提交于
This patch adds support for the OpenRD Ultimate machine (could be found at http://www.arm.linux.org.uk/developer/machines/list.php?id=2884) Signed-off-by: NDmytro Milinevskyy <milinevskyy@gmail.com> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Martin Michlmayr 提交于
Add support for the HP t5325 Thin Client. This thin client is based on a Marvell Kirkwood chip at 1.2 GHz and features 512 MB RAM, 512 MB SATA-attached flash and an XGI Volari Z11 GPU. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Martin Michlmayr 提交于
MPP44 can be used to differentiate between one-bay (TS-11x) and two-bay (TS-21x) devices. According to an engineer from QNAP, the setting of MPP44 depends on the firmware rather than hardware. Presumably, this means that you could fake the MPP44 value by changing the boot loader. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Benjamin Zores 提交于
Add MPP definitions for Marvell Kirkwood 88F6282 revision. Update some defines to reflect datasheet's MPP names. Signed-off-by: NBenjamin Zores <benjamin.zores@alcatel-lucent.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Martin Michlmayr 提交于
On the QNAP TS-41x, MPP45 is used to show the setting of jumper JP1. Fix the documentation to explain what the settings really indicate. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Martin Michlmayr 提交于
Export GPIO 45 which is used to indicate the setting of the JP1 jumper. This is useful for userland tools, such as qcontrol, to see whether the LCD or a serial console is connected. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Arnaud Patard 提交于
Fix the following warning : WARNING: vmlinux.o(.text+0x95a0): Section mismatch in reference from the function qnap_tsx1x_register_flash() to the (unknown reference) .init.data:(unknown) The function qnap_tsx1x_register_flash() references the (unknown reference) __initdata (unknown). This is often because qnap_tsx1x_register_flash lacks a __initdata annotation or the annotation of (unknown) is wrong. Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 14 5月, 2010 1 次提交
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由 Ben Dooks 提交于
Add a kirkwood_nand_init_rnb() call to allow boards which have RnB line detection to register this instead of a static delay. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 04 5月, 2010 4 次提交
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由 Simon Guinot 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Simon Guinot 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Simon Guinot 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Siddarth Gore 提交于
GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0 GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot References: http://www.globalscaletechnologies.com/t-guruplugdetails.aspx http://plugcomputer.org This patch is for GuruPlug Plus, but it supports Standard version as well. Signed-off-by: NSiddarth Gore <gores@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 24 3月, 2010 1 次提交
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由 Christian Lamparter 提交于
Commit "Input: add KEY_WPS_BUTTON definition" added a generic keycode for WPS button. Let's use it, instead of "F1" mapping. Signed-off-by: NChristian Lamparter <chunkeey@googlemail.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 24 2月, 2010 3 次提交
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由 John Holland 提交于
Accept SD CD and SD WP in accordance to http://plugcomputer.org/data/docs/Sheeva-PowerPlug-V1.3-GTI-090906.pdf on MPP 47 and 44 respectively on the eSATA SheevaPlug Signed-off-by: NJohn Holland <john.holland@cellent-fs.de> Signed-off-by: NNicolas Pitre <nico@marvell.com> --
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由 John Holland 提交于
Enable the kirkwood SATA SoC interface on the eSATA SheevaPlug. Signed-off-by: NJohn Holland <john.holland@cellent-fs.de> Signed-off-by: NNicolas Pitre <nico@marvell.com> --
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由 John Holland 提交于
Allow basic eSATA SheevaPlug board configuration and build. Signed-off-by: NJohn Holland <john.holland@cellent-fs.de> Signed-off-by: NNicolas Pitre <nico@marvell.com> --
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- 16 2月, 2010 1 次提交
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由 Fenkart/Bostandzhyan 提交于
Makes it consistent with VMALLOC_START Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NAndreas Fenkart <andreas.fenkart@streamunlimited.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 2月, 2010 1 次提交
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由 Tony Lindgren 提交于
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 2月, 2010 2 次提交
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由 Simon Guinot 提交于
This patch add a GPIO LED named "ns_v2:blue:sata" which can be used to enable or disable SATA activity LED blinking. Signed-off-by: NSimon Guinot <sguinot@lacie.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Simon Guinot 提交于
The Internet and Network Space v2 boards are very close. The only difference is that there is no USB type B plug wired on the Internet Space v2. Signed-off-by: NSimon Guinot <sguinot@lacie.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 05 2月, 2010 2 次提交
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由 Alexander Clouter 提交于
Inspired by the mach-ep93xx flattening work, there is really not much difference between the OpenRD base and client board support so they should be merged together. Signed-off-by: NAlexander Clouter <alex@digriz.org.uk> Acked-by: NSimon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 H Hartley Sweeten 提交于
The (void *) cast is not needed when setting dev.platform_data to the address of the data. Remove the casts. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 11 1月, 2010 1 次提交
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 11 12月, 2009 1 次提交
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由 Simon Guinot 提交于
Signed-off-by: NSimon Guinot <sguinot@lacie.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 14 11月, 2009 5 次提交
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由 Martin Michlmayr 提交于
Remove the code duplication found in the setup files of TS-219 and TS-41x. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Martin Michlmayr 提交于
Add two new models from QNAP to the help text. They are compatible with the TS-119/TS-219 and therefore supported by the current code. The only difference is that they have less RAM (256 MB instead of 512 MB), a slower CPU (800 MHz vs 1.2 GHz) and a plastic case. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Disable propagation of mbus errors to the CPU local bus, as this causes mbus errors (which can occur for example for PCI aborts) to throw CPU aborts, which we're not set up to deal with. Reported-by: NDieter Kiermaier <dk-arm-linux@gmx.de> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Martin Michlmayr 提交于
MPP36 is used on the QNAP TS-11x/TS-21x devices to indicate how much RAM there is: it's high for 512 MB RAM (TS-x19) and low for 256 MB (TS-x10). While this may not be very useful, let's add it for completeness. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Martin Michlmayr 提交于
Add support for the QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 08 11月, 2009 2 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Instead of allocating PCI devices I/O port bus addresses from the 000xxxxx I/O port range as intended, due to a bus versus physical address mixup, the Kirkwood PCIe handling code inadvertently allocated I/O port bus addresses from the f20xxxxx address range (which is the physical address range of the PCIe I/O mapping window), but then direct all I/O port accesses to bus addresses 000xxxxx, which would then not be decoded at all. Fix this by setting the base address of the PCIe I/O space struct resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses offsetted by the former instead of the latter. (The suggested fix of directing I/O port accesses from the host to bus addresses f20xxxxx instead has the problem that assigning full 32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI devices, as not all PCI devices implement full 32 bit BAR registers for I/O ports. We should really try to allocate I/O port bus addresses that fit in 16 bits.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 06 11月, 2009 1 次提交
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由 Li Jie 提交于
kirkwood_timer_init() and kirkwood_pcie_setup() lack of __init which causes following warnings: WARNING: vmlinux.o(.text+0x9568): Section mismatch in reference from the function kirkwood_timer_init() to the function .init.text:kirkwood_find_tclk() The function kirkwood_timer_init() references the function __init kirkwood_find_tclk(). This is often because kirkwood_timer_init lacks a __init annotation or the annotation of kirkwood_find_tclk is wrong. WARNING: vmlinux.o(.text+0x979c): Section mismatch in reference from the function kirkwood_pcie_setup() to the function .init.text:orion_pcie_setup() The function kirkwood_pcie_setup() references the function __init orion_pcie_setup(). This is often because kirkwood_pcie_setup lacks a __init annotation or the annotation of orion_pcie_setup is wrong. Signed-off-by: Nlijie <eltshanli@gmail.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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