- 24 11月, 2010 22 次提交
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由 Chris Wilson 提交于
The pipe control object is allocated by the device for the sole use of the render ringbuffer. Move this detail from the general code to the render ring buffer initialisation. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Having seen the effects of erroneous fencing on the batchbuffer, a useful sanity check is to record the fence registers at the time of an error. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
drivers/char/agp/intel-gtt.c:340:48: warning: duplicate const Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Combining map_and_fenceable revealed a bug in i915_gem_object_gtt_size() in that it always computed the appropriate fence size for the object regardless of tiling state which caused us to over-allocate linear buffers when binding to the GTT. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
A glorified s/obj_priv/obj/ with a net reduction of over a 100 lines and many characters! Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Just some minor shuffling to get rid of any agp traces in the exported functions. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
No more drm_*_agp in i915_gem.c! Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Its only user, intel-gtt.c is now gone. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
This still uses the agp functions to actually reinstate the mappings (with a gross hack to make agp cooperate), but it wires everything up correctly for the switchover. The call to agp_rebind_memory can be dropped because all non-kms drivers do all their rebinding on EnterVT. v2: Be more paranoid and flush the chipset cache after restoring gtt mappings. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
This is required to restore gtt mappings on resume when agp is gone. The right way to do this would be to make sturct drm_mm_node embeddable and use the allocation list maintained by the drm memory manager. But that's a bigger project. Getting rid of the per bo agp_mem will save more memory than this wastes, anyway. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
The intel drm calls the chipset functions now directly. Userspace never called the corresponding ioctl, hence it can be killed, too. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
No longer used. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
... and a few other defines. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Now the intel-gtt.c rewrite is complete! Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Still a separate agp_bridge_driver because of the i81x-only dedicated vram support. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Initialization is still done with the old code with a few added things sprinkled in to make the intel_fake_agp helper functions work. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
Used for the now dead agp type_to_mask stuff. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Daniel Vetter 提交于
i830_check_flags already disallows it, so no need to implement it in the write_entry function. Seems to be a remnant from i810 support. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
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由 Chris Wilson 提交于
Currently if we hit a pagefault when applying a user relocation for the execbuffer, we bail and return EFAULT to the application. Instead, we need to unwind, drop the dev->struct_mutex, copy all the relocation entries to a vmalloc array (to avoid any potential circular deadlocks when resolving the pagefault), retake the mutex and then apply the relocations. Afterwards, we need to again drop the lock and copy the vmalloc array back to userspace. v2: Incorporate feedback from Daniel Vetter. Reported-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 23 11月, 2010 6 次提交
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由 Chris Wilson 提交于
... and no need to perform a linear search for the index. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Now that the stolen memory does not also steal entries from the GTT, we can use all the memory the BIOS set aside for the GPU. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
The GATT is a write-only set of registers, reading from them in the manner of i915_gtt_to_phys() is supposed to be undefined. However a simple solution exists as we allocate linear memory from the stolen area, we can simply add the block offset to the base register. As a side-effect we recover all the unused stolen GTT entries and so enlarge our aperture. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
After a GPU reset, the backlight controller registers may be also reset to 0. In that case we should restore those to the original values programmed by the BIOS. Note that we still lack the code to handle the case where the BIOS failed to program those registers at all... Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 22 11月, 2010 11 次提交
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由 Chris Wilson 提交于
As we conflated intel_sdvo->is_hdmi with both having HDMI support on the ADD along with having HDMI support on the monitor, we would attempt to use HDMI encodings even if the interface did not support those commands. Reported-by: NSimon Farnsworth <simon.farnsworth@onelan.co.uk> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Tested-by: NSimon Farnsworth <simon.farnsworth@onelan.co.uk> Reviewed-by: NSimon Farnsworth <simon.farnsworth@onelan.co.uk>
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由 Keith Packard 提交于
We were reading our 64-bit value in I915_READ64 and returning 32 bits of it. The restoration of fence regs at resume then had a zero end value, and the fence had no effect. Version 2: Split register access functions into per-size versions Sharing code between different sizes seemed reasonable when we only needed a single copy, but as 64-bit access requires its own version, it makes sense to just split them out for each size. Reported-by: NPeter Clifton <pcjc2@cam.ac.uk> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NKeith Packard <keithp@keithp.com> [ickle: use a macro to create the various read/write routines] Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Eric Anholt 提交于
This has proven sufficient to recover from a hang of the GPU using the gem_bad_blit test while at the KMS console then starting X. When attempting the same during an X session, the timer doesn't appear to trigger. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Eric Anholt 提交于
It isn't used for the hangcheck, which does its work right from the timer trigger, but hangcheck can lead to error state recording, which is run off of the workqueue. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
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由 Chris Wilson 提交于
Conflicts: drivers/gpu/drm/i915/i915_gem.c
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由 Chris Wilson 提交于
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由 Chris Wilson 提交于
When trying to diagnose mysterious errors on resume, capture the display register contents as well. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
The pinned buffers are useful for diagnosing errors in setting up state for the chipset, which may not necessarily be 'active' at the time of the error, e.g. the cursor buffer object. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Linus Torvalds 提交于
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- 21 11月, 2010 1 次提交
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由 Chris Wilson 提交于
Under KMS, restoring the cursor is handled upon modeswitch in order to avoid enabling an undefined set of registers. At the moment, the cursor is restored before the aperture and modes are fully setup causing some invalid access during resume, such as: PGTBL_ER: 0x00040000 Invalid GTT entry during Cursor Fetch Fix this by only performing cursor register save/restore under UMS where it is done in the correct sequence. Reported-by: NArkadiusz Miskiewicz <arekm@maven.pl> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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