1. 10 7月, 2014 1 次提交
  2. 09 7月, 2014 2 次提交
  3. 08 7月, 2014 8 次提交
  4. 07 7月, 2014 15 次提交
  5. 05 7月, 2014 1 次提交
  6. 04 7月, 2014 5 次提交
  7. 03 7月, 2014 6 次提交
  8. 02 7月, 2014 2 次提交
    • P
      usb: chipidea: udc: delete td from req's td list at ep_dequeue · e4adcff0
      Peter Chen 提交于
      We need to delete un-finished td from current request's td list
      at ep_dequeue API, otherwise, this non-user td will be remained
      at td list before this request is freed. So if we do ep_queue->
      ep_dequeue->ep_queue sequence, when the complete interrupt for
      the second ep_queue comes, we search td list for this request,
      the first td (added by the first ep_queue) will be handled, and
      its status is still active, so we will consider the this transfer
      still not be completed, but in fact, it has completed. It causes
      the peripheral side considers it never receives current data for
      this transfer.
      
      We met this problem when do "Error Recovery Test - Device Configured"
      test item for USBCV2 MSC test, the host has never received ACK for
      the IN token for CSW due to peripheral considers it does not get this
      CBW, the USBCV test log like belows:
      
      --------------------------------------------------------------------------
      INFO
      Issuing BOT MSC Reset, reset should always succeed
      INFO
      Retrieving status on CBW endpoint
      INFO
      CBW endpoint status = 0x0
      INFO
      Retrieving status on CSW endpoint
      INFO
      CSW endpoint status = 0x0
      INFO
      Issuing required command (Test Unit Ready) to verify device has recovered
      INFO
      Issuing CBW (attempt #1):
      INFO
      |----- CBW LUN                  = 0x0
      INFO
      |----- CBW Flags                = 0x0
      INFO
      |----- CBW Data Transfer Length = 0x0
      INFO
      |----- CBW CDB Length           = 0x6
      INFO
      |----- CBW CDB-00 = 0x0
      INFO
      |----- CBW CDB-01 = 0x0
      INFO
      |----- CBW CDB-02 = 0x0
      INFO
      |----- CBW CDB-03 = 0x0
      INFO
      |----- CBW CDB-04 = 0x0
      INFO
      |----- CBW CDB-05 = 0x0
      INFO
      Issuing CSW : try 1
      INFO
      CSW Bulk Request timed out!
      ERROR
      Failed CSW phase : should have been success or stall
      FAIL
      (5.3.4) The CSW status value must be 0x00, 0x01, or 0x02.
      ERROR
      BOTCommonMSCRequest failed:  error=80004000
      
      Cc: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NPeter Chen <peter.chen@freescale.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e4adcff0
    • M
      drm/radeon: Track the status of a page flip more explicitly · a2b6d3b3
      Michel Dänzer 提交于
      This prevents a panic: radeon_crtc_handle_page_flip() could run before
      radeon_flip_work_func(), triggering the BUG_ON() in drm_vblank_put().
      Tested-by: NDieter Nützel <Dieter@nuetzel-hh.de>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      a2b6d3b3