combine VPCONFIG init voltage setup into common function and use from
both vp_enable and from vp_forceupdate_scale().

NOTE: this patch changes the sequence of when the initVDD bit is
cleared.  The bit is now cleared immediately after it was written.
Since only the rising edge of this bit has any affect according to the
TRM, the exact timing of clearing of this bit should not have any
effect.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Signed-off-by: NKevin Hilman <khilman@ti.com>

Add check for valid VP in omap_vp_update_errorgain()
Signed-off-by: NKevin Hilman <khilman@ti.com>

Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently
relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field
in the upper bits.  Make this explicit using the mask symbol
already defined, added as a new field in struct omap_vp_common.
Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Function pointer used for actual voltage scaling (e.g. VP force update
or VC bypass) is moved from omap_vdd_info into struct voltagedomain,
resulting in renames s/vdd->volt_scale/voltdm->scale/

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove the "runtime" VP data in favor of direct programming of VP registers.
The VP is in the PRM, which is in the wakeup powerdomain, so there is no
need to keep the state dynamically.

Fixes to original version from Nishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Create new helper function in VP layer for updating VP error gain.
Currently used during pre-scale for VP force update and VC bypass.

TODO: determine if this can be removed from the pre-scale path and
moved to VP enable path.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move VP timing calcluation (based on sys clock) and register programming
into VP init.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add sys clock name and rate to struct voltage domain.  SoC specific
voltagedomain init code initializes sys clock name.  After clock
framework is initialized, voltage late init will then use use the
sys_clk rate to calculate the various timing that depend on that rate.
Signed-off-by: NKevin Hilman <khilman@ti.com>

In struct omap_vp_common, the shift value can be derived from the mask
value by using __ffs(), so remove the shift value for the various
VPCONFIG bitfields, and use __ffs() in the code for the shift value.

While here, rename field names in kerneldoc comment to match actual
field names in structure.  Also, cleanup indendentaion for other VP
register accesses in omap_vp_init().

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove read-only debugfs interface to VP values.  Most of the values
are init-time only and never change.  Current voltage value should be
retreived from the (eventual) regulator framework interface to the
voltage domain.

Fixes to original version provided by Nishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

- move VP instance struct from vdd_info into struct voltage domain
- remove _data suffix from structure name
- rename vp_ prefix from vp_common field: accesses are now vp->common
- move vp_enabled bool from vdd_info into VP instance
- remove remaining references to omap_vdd_info

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Instead of reading current vsel value from the VP's voltage register,
just use current nominal voltage translated into vsel via the PMIC.

Doing this allows VC bypass scaling to work even without a VP configured.
Signed-off-by: NKevin Hilman <khilman@ti.com>

On OMAP3+, all VC channels have the the same bitfield ordering for all
VC channels, except the OMAP4 MPU channel.  This appears to be a freak
accident as all other VC channel (including OMAP5) have the standard
configuration.  Handle the mutant case by adding a per-channel flag
to signal the deformity and handle it during VC init.

Special thanks to Nishanth Menon <nm@ti.com> for finding this problem
and for proposing the initial solution.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove hard-coded I2C configuration in favor of settings that can be
configured from PMIC-specific values.  Currently only high-speed mode
and the master-code value are supported, since they were the only
fields currently used, but extending this is now trivial.

Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse
problem and making omap_vc_i2c_init() static, as well as finding and
fixing a problem with the shift/mask of mcode.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move structure containing PMIC configurable settings into struct
voltagedomain.  In the process, rename from omap_volt_pmic_info to
omap_voltdm_pmic (_info suffix is not helpful.)

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

VC channel configuration is programmed based on settings coming from
the PMIC configuration.

Currently, the VC channel to PMIC mapping is a simple one-to-one
mapping.  Whenever a VC channel parameter is configured (i2c slave
addres, PMIC register address, on/ret/off command), the corresponding
bits are enabled in the VC channel configuration register.

If necessary, the programmability of channel configuration settings
could be extended to board/PMIC files, however, because this patch
changes the channel configuration to be programmed based on existing
values from the PMIC settings, it may not be required.

Also note that starting with OMAP4, where there are more than 2
channels, one channel is identified as the "default" channel.  When
any of the bits in the channel config for the other channels are zero,
it means to use the default channel.  The OMAP4 TRM (at least through
NDA version Q) is wrong in describing which is the default channel.
The default channel on OMAP4 is MPU, not CORE as decribed in the TRM.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Configuring the on/onlp/ret/off command values is common to OMAP3 & 4.
Move from OMAP3-only init into common VC init.
Signed-off-by: NKevin Hilman <khilman@ti.com>

- add setup_time field to struct omap_vc_channel (init'd from PMIC data)
- use VC/VP register access helper for read/modify/write
- move VFSM structure from omap_vdd_info into struct voltagedomain
- remove redunant _data suffix from VFSM structures and variables
- remove voltsetup_shift, use ffs() on the mask value to find the shift
Signed-off-by: NKevin Hilman <khilman@ti.com>

The PMIC configurable variables should be isolated to VC initialization.
The rest of the VC functions (like VC bypass) should use the i2c slave address
and voltage register address fields from struct omap_vc_channel.
Signed-off-by: NKevin Hilman <khilman@ti.com>

- support both voltage register address and command register address
  for each VC channel
- add fields for voltage register address (volra) and command register
  address (cmdra) to struct omap_vc_channel
- use VC/VP register access read/modify/write helper
- remove volra_shift field (use __ffs(mask) for shift value)
- I2C addresses 10-bit, change size to u16
Signed-off-by: NKevin Hilman <khilman@ti.com>

- Add an i2c_slave_address field to the omap_vc_channel
- use VC/VP read/modify/write helper instead of open-coding
- remove smps_sa_shift, use __ffs(mask) for shift value
- I2C addresses 10-bit, change size to u16

Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting
the use of __ffs(x) instead of ffs(x) - 1.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Convert VC/VP register access to use PRM VC/VP accessor functions.  In
the process, move the read/write function pointers from vdd_info into
struct voltagedomain.

No functional changes.

Additional cleanup:
- remove prm_mod field from  VC/VP data structures, the PRM register
  access functions know which PRM module to use.
Signed-off-by: NKevin Hilman <khilman@ti.com>

On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM.  Add some PRM helper functions for register access to
these module registers.

Thanks to Nishanth Menon for finding/fixing a sparse problem.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Replace the VP tranxdone check/clear with helper functions from the
PRM layer.

In the process, remove prm_irqst_* voltage structure fields for IRQ
status checking which are no longer needed.

Since these reads/writes of the IRQ status bits were the only PRM
accesses that were not to VC/VP registers, this allows the rest of the
register accesses in the VC/VP code to use VC/VP specific register
access functions (done in the following patch.)
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add SoC specific PRM VP helper functions for checking and clearing
the VP transaction done status.

Longer term, these events should be handled by the forthcoming PRCM
interrupt handler.
Signed-off-by: NKevin Hilman <khilman@ti.com>

The VC layer can support PMICs with separate voltage and command
registers by putting the different registers in the PRM_VC_SMPS_VOL_RA
and PRCM_VC_SMPS_CMD_RA registers respectively.

The PMIC data must supply at least a voltage register address
(volt_reg_addr).  The command register address (cmd_reg_addr) is
optional.  If the PMIC data does not supply a separate command
register address, the VC will use the voltage register address for both.
Signed-off-by: NKevin Hilman <khilman@ti.com>

This patch is primarily a move of VP specific code from voltage.c into
its own code in vp.c and adds prototypes to vp.h

No functional changes, except debugfs...

VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_'
prefixes removed from all debugfs filenames.
Signed-off-by: NKevin Hilman <khilman@ti.com>

VC is initialized first, set default scaling method to VC bypass.
If/when VP is initialized, default scaling method will be changed to
VP force-update.

Enabling VC bypass as default as soon as VC is initialized allows for
VC bypass scaling to work when no VP is configured/initialized for a
given voltage domain.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move the VC instance struct from omap_vdd_info into struct voltagedomain.
While moving, perform some misc. renames for readability.

No functional changes.

Summary of renames:
- rename omap_vc_instance to omap_vc_channel, since there is only
  one instance of the VC IP and this actually represents channels
  using TRM terminology.
- rename 'vc_common' field of VC channel which led to:
  s/vc->vc_common/vc->common/
- remove redundant '_data' suffix
- OMAP3: vc1 --> vc_mpu, vc2 --> vc_core
- omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale()
Signed-off-by: NKevin Hilman <khilman@ti.com>

merge

As part of the voltage layer cleanup, split out VC specific code into
a dedicated VC layer.  This patch primarily just moves VC code from
voltage.c into vc.c, and adds prototypes to vc.h.

No functional changes.

For readability, each function was given a local 'vc' pointer:

    struct omap_vc_instance_data *vc = voltdm->vdd->vc_data;

and a global replace of s/vdd->vc_data/vc/ was done.

Also vc_init was renamed to vc_init_channel to reflect that this is
per-VC channel initializtion.
Signed-off-by: NKevin Hilman <khilman@ti.com>

When a powerdomain is registered and it has an associated voltage domain,
add the powerdomain to the voltagedomain using voltdm_add_pwrdm().

Also add voltagedomain iterator helper functions to iterate over all
registered voltagedomains and all powerdomains associated with a
voltagedomain.

Modeled after a similar relationship between clockdomains and powerdomains.
Signed-off-by: NKevin Hilman <khilman@ti.com>

When a powerdomain is registered, lookup the voltage domain by name
and keep a pointer to the containing voltagedomain in the powerdomain
structure.

Modeled after similar method between powerdomain and clockdomain layers.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add voltage domain name to indicate which voltagedomain each
powerdomain is in.

The fixed voltage domain like ldo_wakeup for emu and wkup power
domain is added too.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add voltage domain name to indicate which voltagedomain each
powerdomain is in.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains
with the newly created voltage domains.

While here, update copyright on powerdomain data to 2011.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Each powerdomain is associated with a voltage domain.  Add an entry to
struct powerdomain where the enclosing voltagedomain can be
referenced.

Modeled after similar relationship between clockdomains and powerdomains.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add a 'bool scalable' flag to the struct powerdomain and set it for
the scalable domains on OMAP3 and OMAP4.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add wakeup voltage domain so that the wakeup powerdomain can have an
associated powerdomain.  Note that the scalable flat is not set for
the this voltagedomain, so it will not be fully initialized like
scalable voltage domains.
Signed-off-by: NKevin Hilman <khilman@ti.com>

This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so
rename appropriately.

Also fixup any users of the "mpu" name to use "mpu_iva"
Signed-off-by: NKevin Hilman <khilman@ti.com>