- 08 5月, 2016 5 次提交
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
This was only used for atomic commit these days. So instead just give atomic it's own work-queue where we can do a block on each bo in turn. Simplifies things a whole bunch and makes the 'struct fence' conversion easier. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Better encapsulate the per-timeline stuff into fence-context. For now there is just a single fence-context, but eventually we'll also have one per-CRTC to enable fully explicit fencing. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
This was always the intention, but somehow it was never wired up properly. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 16 1月, 2016 1 次提交
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由 Dan Williams 提交于
Convert the raw unsigned long 'pfn' argument to pfn_t for the purpose of evaluating the PFN_MAP and PFN_DEV flags. When both are set it triggers _PAGE_DEVMAP to be set in the resulting pte. There are no functional changes to the gpu drivers as a result of this conversion. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Cc: Dave Hansen <dave@sr71.net> Cc: David Airlie <airlied@linux.ie> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 15 8月, 2015 1 次提交
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由 Wentao Xu 提交于
The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: NWentao Xu <wentaox@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 30 7月, 2015 1 次提交
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由 Wentao Xu 提交于
The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: NWentao Xu <wentaox@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 12 6月, 2015 2 次提交
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由 Rob Clark 提交于
The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but converting this directly to jiffies doesn't take into account the initial jiffies count at boot, which may differ from the base time of CLOCK_MONOTONIC. TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as suggested by Arnd) v2: switch over from 'struct timespec' to ktime_t throughout, since 'struct timespec' will be deprecated (as suggested by Arnd) v3: minor cosmetic tweaks Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 jilai wang 提交于
If the GEM object is imported, drm_prime_gem_destroy needs to be called to clean up dma buffer related information. Signed-off-by: NJilai Wang <jilaiw@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 14 5月, 2015 1 次提交
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由 Thierry Reding 提交于
Avoid casts from pointers to fixed-size integers to prevent the compiler from warning. Print virtual memory addresses using %p instead. Also turn a couple of %d/%x specifiers into %zu/%zd/%zx to avoid further warnings due to mismatched format strings. Signed-off-by: NThierry Reding <treding@nvidia.com> Reviewed-by: NRob Clark <robdclark@gmail.com>
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- 02 4月, 2015 1 次提交
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由 Rob Clark 提交于
Add support to use the VRAM carveout (if specified in dtb) for fbdev scanout buffer. This allows drm/msm to take over a bootloader splash- screen, and avoids corruption on screen that results if the kernel uses memory that is still being scanned out for itself. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 17 12月, 2014 1 次提交
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由 Markus Elfring 提交于
The functions framebuffer_release() and vunmap() perform also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Reviewed-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 17 11月, 2014 3 次提交
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由 Rob Clark 提交于
Use pre-computed iova when unmapping, to reduce the places we assume iova and mmap offset are (at the moment) the same. And get rid of an extra drm_gem_free_mmap_offset() call (since it is already called from drm_gem_object_release()) Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Atomic wants to split the prepare/pin from where we actually program the scanout address (so that any part that can fail is done synchronously). Add some fb/gem apis to make this easier to use from the kms parts. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Give ourselves a way to wait for certain fence #.. makes it easier to wait on a set of bo's, which we'll need for atomic. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 04 8月, 2014 1 次提交
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 08 7月, 2014 1 次提交
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由 David Herrmann 提交于
drm_gem_get_pages() currently allows passing a 'gfp' parameter that is passed to shmem combined with mapping_gfp_mask(). Given that the default mapping_gfp_mask() is GFP_HIGHUSER, it is _very_ unlikely that anyone will ever make use of that parameter. In fact, all drivers currently pass redundant flags or 0. This patch removes the 'gfp' parameter. The only reason to keep it is to remove flags like __GFP_WAIT. But in its current form, it can only be used to add flags. So to remove __GFP_WAIT, you'd have to drop it from the mapping_gfp_mask, which again is stupid as this mask is used by shmem-core for other allocations, too. If any driver ever requires that parameter, we can introduce a new helper that takes the raw 'gfp' parameter. The caller'd be responsible to combine it with mapping_gfp_mask() in a suitable way. The current drm_gem_get_pages() helper would then simply use mapping_gfp_mask() and call the new helper. This is what shmem_read_mapping_pages{_gfp,} does right now. Moreover, the gfp-zone flag-usage is not obvious: If you pass a modified zone, shmem core will WARN() or even BUG(). In other words, the following must be true for 'gfp' passed to shmem_read_mapping_pages_gfp(): gfp_zone(mapping_gfp_mask(mapping)) == gfp_zone(gfp) Add a comment to drm_gem_read_pages() explaining that constraint. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com>
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- 22 6月, 2014 1 次提交
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由 Stephane Viau 提交于
If probe fails after IOMMU is attached, we need to detach in order to clean up properly. Before this change, IOMMU faults would occur if the probe failed (-EPROBE_DEFER). Signed-off-by: NStephane Viau <sviau@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 25 4月, 2014 1 次提交
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由 Micah Richert 提交于
Signed-off-by: NMicah Richert <richert@braincorporation.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 06 2月, 2014 1 次提交
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由 Rob Clark 提交于
We already hold struct_mutex here. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 10 1月, 2014 1 次提交
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由 Rob Clark 提交于
Add a VRAM carveout that is used for systems which do not have an IOMMU. The VRAM carveout uses CMA. The arch code must setup a CMA pool for the device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not cool). The user can configure the VRAM pool size using msm.vram module param. Technically, the abstraction of IOMMU behind msm_mmu is not strictly needed, but it simplifies the GEM code a bit, and will be useful later when I add support for a2xx devices with GPUMMU, so I decided to keep this part. It appears to be possible to configure the GPU to restrict access to addresses within the VRAM pool, but this is not done yet. So for now the GPU will refuse to load if there is no sort of mmu. Once address based limits are supported and tested to confirm that we aren't giving the GPU access to arbitrary memory, this restriction can be lifted Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 02 11月, 2013 3 次提交
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由 Rob Clark 提交于
Subsequent threads returning EBUSY from vm_insert_pfn() was not handled correctly. As a result concurrent access from new threads to mmapped data caused SIGBUS. See e79e0fe3Signed-off-by: NRob Clark <robdclark@gmail.com> Acked-by: NDavid Brown <davidb@codeaurora.org>
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由 Rob Clark 提交于
Re-arrange things a bit so that we can get work requested after a bo fence passes, like pageflip, done before retiring bo's. Without any sort of bo cache in userspace, some games can trigger hundred's of transient bo's, which can cause retire to take a long time (5-10ms). Obviously we want a bo cache.. but this cleanup will make things a bit easier for atomic as well and makes things a bit cleaner. Signed-off-by: NRob Clark <robdclark@gmail.com> Acked-by: NDavid Brown <davidb@codeaurora.org>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com> Acked-by: NDavid Brown <davidb@codeaurora.org>
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- 28 9月, 2013 1 次提交
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 16 9月, 2013 1 次提交
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由 Rob Clark 提交于
This was inherited from i915/udl, and not actually needed. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 12 9月, 2013 2 次提交
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由 Rob Clark 提交于
When we CPU_PREP a bo with NOSYNC flag (for example, to implement PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE), an -EBUSY return indicates to userspace that the bo is still busy. Previously it was incorrectly returning 0 in this case. And while we're in there throw in an bit of extra sanity checking in case userspace tries to wait for a bogus fence. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Wei Yongjun 提交于
In case of error, the function drm_prime_pages_to_sg() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
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- 11 9月, 2013 1 次提交
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由 Rob Clark 提交于
The userspace API already had everything needed to handle read vs write synchronization. This patch actually bothers to hook it up properly, so that we don't need to (for example) stall on userspace read access to a buffer that gpu is also still reading. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 25 8月, 2013 2 次提交
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由 Rob Clark 提交于
Add initial support for a3xx 3d core. So far, with hardware that I've seen to date, we can have: + zero, one, or two z180 2d cores + a3xx or a2xx 3d core, which share a common CP (the firmware for the CP seems to implement some different PM4 packet types but the basics of cmdstream submission are the same) Which means that the eventual complete "class" hierarchy, once support for all past and present hw is in place, becomes: + msm_gpu + adreno_gpu + a3xx_gpu + a2xx_gpu + z180_gpu This commit splits out the parts that will eventually be common between a2xx/a3xx into adreno_gpu, and the parts that are even common to z180 into msm_gpu. Note that there is no cmdstream validation required. All memory access from the GPU is via IOMMU/MMU. So as long as you don't map silly things to the GPU, there isn't much damage that the GPU can do. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
The snapdragon chips have multiple different display controllers, depending on which chip variant/version. (As far as I can tell, current devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And then external to the display controller are HDMI, DSI, etc. blocks which may be shared across devices which have different display controller blocks. To more easily add support for different display controller blocks, the display controller specific bits are split out into a "kms" module, which provides the kms plane/crtc/encoder objects. The external HDMI, DSI, etc. blocks are part encoder, and part connector currently. But I think I will pull in the drm_bridge patches from chromeos tree, and split them into a bridge+connector, with the registers that need to be set in modeset handled by the bridge. This would remove the 'msm_connector' base class. But some things need to be double checked to make sure I could get the correct ON/OFF sequencing.. This patch adds support for mdp4 crtc (including hw cursor), dtv encoder (part of MDP4 block), and hdmi. Signed-off-by: NRob Clark <robdclark@gmail.com>
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