this field will hold the next expected event.

In certain cases, host might fall into some error
condition and ask from us the wrong Control phase.
On such situations, we should stall and restart.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Whenever we issue a Set Stall command on EP0,
the state machine will be restarted and Stall
is cleared automatically, when core receives
the next SETUP packet.

There's no need to track that EP0_STALL state.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

- since a while we are disabling an endpoint and purging every requests on
  RESET and DISCONNECT which leads to a warning since the endpoint was
  disabled twice (once by the UDC, and second time by the gadget). I
  think UDC should nuke all requests because all those requests
  become invalid. It's gadget driver's responsability, though, to disable
  its used endpoints. This is done by merging dwc3_stop_active_transfer()
  and dwc3_gadget_nuke_reqs() into dwc3_remove_requests().

- dwc3_stop_active_transfer() is now no longer called unconditionaly.
  This has the advantage that it is always called to disable an active
  transfer which means if res_trans_idx 0 than something went wrong and
  it is an error condition because we can't clean up the requests.

- Remove the DWC3_EP_WILL_SHUTDOWN which was introduced while
  introducing the command complete part for dequeue. All requests on
  req_queued list should be removed during the dwc3_cleanup_done_reqs()
  callback so there is no reason to go through the list again.
  We consider it an error condition if requests are still on this
  list since we never queue TRB without LST=1 (the last requests has
  always LST=1, there are no requests with LST=0 behind it).

[ balbi@ti.com : reworked commit log a bit, made patch apply ]
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

The DesignWare USB3 core tells us which phase
of a control transfer should be started, it
also tells us which physical endpoint needs
that transfer.

With these two informations, we have all we
need to simply EP0 handling quite a lot and
get rid rid of the SW state machine tracking
ep0 states.

For achieving this perfectly, we needed to
add support for situations where we get
XferNotReady while endpoint is still busy
and XferNotReady while gadget driver still
hasn't queued a request.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Add a flag to keep track of ep0 direction.
This flag will be used on a following patch.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This core cannot handle OUT transfers which aren't
aligned to wMaxPacketSize, but that can happen at
least on control endpoint with the USB Audio Class.

This patch adds a bounce buffer to be used on the
case of a non-aligned ep0out request is queued.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

The status field of the Transfer Not Read event
is different on Control Endpoints. On this patch
we are just adding the defines to be used on a
later patch which will re-work the control endpoint
handling.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

trivial patch, no functional changes
Signed-off-by: NFelipe Balbi <balbi@ti.com>

The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.

Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.

The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.

More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.

While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.

[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>