1. 16 2月, 2012 2 次提交
  2. 14 2月, 2012 9 次提交
    • T
      powerpc/pseries/eeh: Fix crash when error happens during device probe · 778a785f
      Thadeu Lima de Souza Cascardo 提交于
      EEH may happen during a PCI driver probe. If the driver is trying to
      access some register in a loop, the EEH code will try to print the
      driver name. But the driver pointer in struct pci_dev is not set until
      probe returns successfully.
      
      Use a function to test if the device and the driver pointer is NULL
      before accessing the driver's name.
      Signed-off-by: NThadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      778a785f
    • B
      powerpc/pseries: Fix partition migration hang in stop_topology_update · 444080d1
      Brian King 提交于
      This fixes a hang that was observed during live partition migration.
      Since stop_topology_update must not be called from an interrupt
      context, call it earlier in the migration process. The hang observed
      can be seen below:
      
      WARNING: at kernel/timer.c:1011
      Modules linked in: ip6t_LOG xt_tcpudp xt_pkttype ipt_LOG xt_limit ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_raw xt_NOTRACK ipt_REJECT xt_state iptable_raw iptable_filter ip6table_mangle nf_conntrack_netbios_ns nf_conntrack_broadcast nf_conntrack_ipv4 nf_conntrack nf_defrag_ipv4 ip_tables ip6table_filter ip6_tables x_tables ipv6 fuse loop ibmveth sg ext3 jbd mbcache raid456 async_raid6_recov async_pq raid6_pq async_xor xor async_memcpy async_tx raid10 raid1 raid0 scsi_dh_alua scsi_dh_rdac scsi_dh_hp_sw scsi_dh_emc dm_round_robin dm_multipath scsi_dh sd_mod crc_t10dif ibmvfc scsi_transport_fc scsi_tgt scsi_mod dm_snapshot dm_mod
      NIP: c0000000000c52d8 LR: c00000000004be28 CTR: 0000000000000000
      REGS: c00000005ffd77d0 TRAP: 0700   Not tainted  (3.2.0-git-00001-g07d106d0)
      MSR: 8000000000021032 <ME,CE,IR,DR>  CR: 48000084  XER: 00000001
      CFAR: c00000000004be20
      TASK = c00000005ec78860[0] 'swapper/3' THREAD: c00000005ec98000 CPU: 3
      GPR00: 0000000000000001 c00000005ffd7a50 c000000000fbbc98 c000000000ec8340
      GPR04: 00000000282a0020 0000000000000000 0000000000004000 0000000000000101
      GPR08: 0000000000000012 c00000005ffd4000 0000000000000020 c000000000f3ba88
      GPR12: 0000000000000000 c000000007f40900 0000000000000001 0000000000000004
      GPR16: 0000000000000001 0000000000000000 0000000000000000 c000000001022310
      GPR20: 0000000000000001 0000000000000000 0000000000200200 c000000001029e14
      GPR24: 0000000000000000 0000000000000001 0000000000000040 c00000003f74bc80
      GPR28: c00000003f74bc84 c000000000f38038 c000000000f16b58 c000000000ec8340
      NIP [c0000000000c52d8] .del_timer_sync+0x28/0x60
      LR [c00000000004be28] .stop_topology_update+0x20/0x38
      Call Trace:
      [c00000005ffd7a50] [c00000005ec78860] 0xc00000005ec78860 (unreliable)
      [c00000005ffd7ad0] [c00000000004be28] .stop_topology_update+0x20/0x38
      [c00000005ffd7b40] [c000000000028378] .__rtas_suspend_last_cpu+0x58/0x260
      [c00000005ffd7bf0] [c0000000000fa230] .generic_smp_call_function_interrupt+0x160/0x358
      [c00000005ffd7cf0] [c000000000036ec8] .smp_ipi_demux+0x88/0x100
      [c00000005ffd7d80] [c00000000005c154] .icp_hv_ipi_action+0x5c/0x80
      [c00000005ffd7e00] [c00000000012a088] .handle_irq_event_percpu+0x100/0x318
      [c00000005ffd7f00] [c00000000012e774] .handle_percpu_irq+0x84/0xd0
      [c00000005ffd7f90] [c000000000022ba8] .call_handle_irq+0x1c/0x2c
      [c00000005ec9ba20] [c00000000001157c] .do_IRQ+0x22c/0x2a8
      [c00000005ec9bae0] [c0000000000054bc] hardware_interrupt_entry+0x18/0x1c
      Exception: 501 at .cpu_idle+0x194/0x2f8
          LR = .cpu_idle+0x194/0x2f8
      [c00000005ec9bdd0] [c000000000017e58] .cpu_idle+0x188/0x2f8 (unreliable)
      [c00000005ec9be90] [c00000000067ec18] .start_secondary+0x3e4/0x524
      [c00000005ec9bf90] [c0000000000093e8] .start_secondary_prolog+0x10/0x14
      Instruction dump:
      ebe1fff8 4e800020 fbe1fff8 7c0802a6 f8010010 7c7f1b78 f821ff81 78290464
      80090014 5400019e 7c0000d0 78000fe0 <0b000000> 4800000c 7c210b78 7c421378
      Signed-off-by: NBrian King <brking@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      444080d1
    • M
      powerpc/powernv: Disable interrupts while taking phb->lock · f1c853b5
      Michael Ellerman 提交于
      We need to disable interrupts when taking the phb->lock. Otherwise
      we could deadlock with pci_lock taken from an interrupt.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f1c853b5
    • B
      powerpc: Fix WARN_ON in decrementer_check_overflow · 6fe5f5f3
      Benjamin Herrenschmidt 提交于
      We use __get_cpu_var() which triggers a false positive warning
      in smp_processor_id() thinking interrupts are enabled (at this
      point, they are soft-enabled but hard-disabled).
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6fe5f5f3
    • B
      powerpc/wsp: Fix IRQ affinity setting · 7a768d30
      Benjamin Herrenschmidt 提交于
      We call the cache_hwirq_map() function with a linux IRQ number
      but it expects a HW irq number. This triggers a BUG on multic-chip
      setups in addition to not doing the right thing.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      7a768d30
    • S
      powerpc: Implement GET_IP/SET_IP · e6289427
      Srikar Dronamraju 提交于
      With this change, helpers such as instruction_pointer() et al, get defined
      in the generic header in terms of GET_IP
      
      Removed the unnecessary definition of profile_pc in !CONFIG_SMP case as
      suggested by Mike Frysinger.
      Signed-off-by: NSrikar Dronamraju <srikar@linux.vnet.ibm.com>
      Signed-off-by: NAnanth N Mavinakayanahalli <ananth@in.ibm.com>
      Acked-by: NMike Frysinger <vapier@gentoo.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e6289427
    • B
      powerpc/wsp: Permanently enable PCI class code workaround · 454c0bfd
      Benjamin Herrenschmidt 提交于
      It appears that on the Chroma card, the class code of the root
      complex is still wrong even on DD2 or later chips. This could
      be a firmware issue, but that breaks resource allocation so let's
      unconditionally fix it up.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      454c0bfd
    • L
      i387: make irq_fpu_usable() tests more robust · 5b1cbac3
      Linus Torvalds 提交于
      Some code - especially the crypto layer - wants to use the x86
      FP/MMX/AVX register set in what may be interrupt (typically softirq)
      context.
      
      That *can* be ok, but the tests for when it was ok were somewhat
      suspect.  We cannot touch the thread-specific status bits either, so
      we'd better check that we're not going to try to save FP state or
      anything like that.
      
      Now, it may be that the TS bit is always cleared *before* we set the
      USEDFPU bit (and only set when we had already cleared the USEDFP
      before), so the TS bit test may actually have been sufficient, but it
      certainly was not obviously so.
      
      So this explicitly verifies that we will not touch the TS_USEDFPU bit,
      and adds a few related sanity-checks.  Because it seems that somehow
      AES-NI is corrupting user FP state.  The cause is not clear, and this
      patch doesn't fix it, but while debugging it I really wanted the code to
      be more obviously correct and robust.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      5b1cbac3
    • L
      i387: math_state_restore() isn't called from asm · be98c2cd
      Linus Torvalds 提交于
      It was marked asmlinkage for some really old and stale legacy reasons.
      Fix that and the equally stale comment.
      
      Noticed when debugging the irq_fpu_usable() bugs.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      be98c2cd
  3. 13 2月, 2012 11 次提交
    • R
      ARM: omap: resolve nebulous 'Error setting wl12xx data' · 70d669de
      Russell King 提交于
      It's useful to print the error code when a called function fails so a
      diagnosis of why it failed is possible.  In this case, it fails because
      we try to register some data for the wl12xx driver, but as the driver
      is not configured, a stub function is used which simply returns -ENOSYS.
      
      Let's do the simple thing for -rc and print the error code.
      
      Also, the return code from platform_register_device() at each of these
      sites was not being checked.  Add some checking, and again print the
      error code.
      
      This should be fixed properly for the next merge window so we don't
      issue error messages merely because a driver is not configured.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      70d669de
    • R
      ARM: omap: fix wrapped error messages in omap_hwmod.c · 4f8a428d
      Russell King 提交于
      While trying to debug my OMAP platforms, they emitted this message:
      
      omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state
      
      The following backtrace said it was from a function called '_enable',
      which didn't provide much clue.  Grepping didn't find it either.
      
      The message is wrapped, so unwrap the message so grep can find it.  Do
      the same for three other messages in this file.
      Acked-by: NPaul Walmsley <paul@pwsan.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      4f8a428d
    • R
      ARM: omap: fix section mismatch warnings in mux.c caused by hsmmc.c · 8930b4e3
      Russell King 提交于
      The previous commit causes new section mismatch warnings:
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb30): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_gpio()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_gpio().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_gpio is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb4c): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_gpio()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_gpio().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_gpio is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb60): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb6c): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb78): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb90): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdb9c): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdba8): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdbc0): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdbcc): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdbd8): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdbf8): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc04): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc10): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc28): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc34): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc40): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc58): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc64): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc70): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xdc7c): Section mismatch in reference from the function omap_init_hsmmc() to the function .init.text:omap_mux_init_signal()
      The function omap_init_hsmmc() references
      the function __init omap_mux_init_signal().
      This is often because omap_init_hsmmc lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      
      Again, as for omap2_hsmmc_init(), these functions are callable at
      runtime via the gpio-twl4030.c driver, and so these can't be marked
      __init.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8930b4e3
    • R
      ARM: omap: fix section mismatch warning for sdp3430_twl_gpio_setup() · a98f77bb
      Russell King 提交于
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xd0f0): Section mismatch in reference from the function sdp3430_twl_gpio_setup() to the function .init.text:omap2_hsmmc_init()
      The function sdp3430_twl_gpio_setup() references
      the function __init omap2_hsmmc_init().
      This is often because sdp3430_twl_gpio_setup lacks a __init
      annotation or the annotation of omap2_hsmmc_init is wrong.
      
      sdp3430_twl_gpio_setup() is called via platform data from the
      gpio-twl4030 module, which can be inserted and removed at runtime.
      This makes sdp3430_twl_gpio_setup() callable at runtime, and prevents
      it being marked with an __init annotation.
      
      As it calls omap2_hsmmc_init() unconditionally, the only resolution to
      this warning is to remove the __init markings from omap2_hsmmc_init()
      and its called functions.  This addresses the functions in hsmmc.c.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a98f77bb
    • R
      ARM: omap: fix section mismatch error for omap_4430sdp_display_init() · e3958fe0
      Russell King 提交于
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0xb798): Section mismatch in reference from the function omap_4430sdp_display_init() to the function .init.text:omap_display_init()
      The function omap_4430sdp_display_init() references
      the function __init omap_display_init().
      This is often because omap_4430sdp_display_init lacks a __init
      annotation or the annotation of omap_display_init is wrong.
      
      Fix this by adding __init to omap_4430sdp_display_init().
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e3958fe0
    • R
      ARM: omap: fix section mismatch warning for omap_secondary_startup() · 45176f4c
      Russell King 提交于
      WARNING: vmlinux.o(.text+0x1c664): Section mismatch in reference from the function omap_secondary_startup() to the function .cpuinit.text:secondary_startup()
      The function omap_secondary_startup() references
      the function __cpuinit secondary_startup().
      This is often because omap_secondary_startup lacks a __cpuinit
      annotation or the annotation of secondary_startup is wrong.
      
      Unfortunately, fixing this causes a new warning which is harder to
      solve:
      
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0x5328): Section mismatch in reference from the function omap4_hotplug_cpu() to the function .cpuinit.text:omap_secondary_startup()
      The function omap4_hotplug_cpu() references
      the function __cpuinit omap_secondary_startup().
      This is often because omap4_hotplug_cpu lacks a __cpuinit
      annotation or the annotation of omap_secondary_startup is wrong.
      
      because omap4_hotplug_cpu() is used by power management code as well,
      which may not end up using omap_secondary_startup().
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      45176f4c
    • R
      ARM: omap: preemptively fix section mismatch in omap4_sdp4430_wifi_mux_init() · d5de63f5
      Russell King 提交于
      Found by review.
      
      omap4_sdp4430_wifi_mux_init() is called by an __init marked function,
      and only calls omap_mux_init_gpio() and omap_mux_init_signal() which
      are both also an __init marked functions.
      
      The only reason this doesn't issue a warning is because the compiler
      inlines omap4_sdp4430_wifi_mux_init() into omap4_sdp4430_wifi_init().
      
      So, lets add the __init annotation to ensure this remains safe should
      the compiler choose not to inline.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d5de63f5
    • R
      ARM: omap: fix section mismatch warning in mux.c · 27d8d3bf
      Russell King 提交于
      WARNING: arch/arm/mach-omap2/built-in.o(.text+0x15a4): Section mismatch in reference from the function omap_mux_init_signals() to the function .init.text:omap_mux_init_signal()
      The function omap_mux_init_signals() references
      the function __init omap_mux_init_signal().
      This is often because omap_mux_init_signals lacks a __init
      annotation or the annotation of omap_mux_init_signal is wrong.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      27d8d3bf
    • R
      ARM: omap: fix uninformative vc/i2c configuration error message · 0bf68f53
      Russell King 提交于
      On my OMAP4 platform, I'm getting this error message repeated several
      times at boot:
      
      omap_vc_i2c_init: I2C config for all channels must match.
      omap_vc_i2c_init: I2C config for all channels must match.
      
      This doesn't help identify what the problem is.  Fix this message to
      be more informative:
      
      omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0).
      omap_vc_i2c_init: I2C config for vdd_mpu does not match other channels (0).
      
      This allows us to identify which voltage domains have a problem, and
      what the I2C configuration state (a boolean, i2c_high_speed) setting
      being used actually is.
      
      From this we find that omap4_core_pmic has i2c_high_speed false, but
      omap4_iva_pmic and omap4_mpu_pmic both have it set true.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      0bf68f53
    • R
      ARM: omap: fix vc.c PMIC error message · 2d5b4790
      Russell King 提交于
      While testing on my OMAP3430 platform, this error message was emitted:
      
      omap_vc_init_channel: PMIC info requried to configure vc forvdd_core not populated.Hence cannot initialize vc
      
      Trying to find this message was difficult because it was wrapped across
      several lines.  It also mis-spells "required", doesn't read very well,
      and has spaces lacking.  Let's replace it with a more concise:
      
      omap_vc_init_channel: No PMIC info for vdd_core
      
      While we're here, fix a simple spelling error in a comment.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      2d5b4790
    • R
      ARM: omap: fix prm44xx.c OMAP44XX_IRQ_PRCM build error · e6fa35aa
      Russell King 提交于
      When CONFIG_OF is disabled, the compile fails with:
      
      arch/arm/mach-omap2/prm44xx.c:41: error: 'OMAP44XX_IRQ_PRCM' undeclared here (not in a function)
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e6fa35aa
  4. 10 2月, 2012 5 次提交
    • P
      tty: serial: OMAP: block idle while the UART is transferring data in PIO mode · be4b0281
      Paul Walmsley 提交于
      Prevent OMAP UARTs from going idle while they are still transferring
      data in PIO mode.  This works around an oversight in the OMAP UART
      hardware present in OMAP34xx and earlier: an idle UART won't send a
      wakeup when the TX FIFO threshold is reached.  This causes long delays
      during data transmission when the MPU powerdomain enters a low-power
      mode.  The MPU interrupt controller is not able to respond to
      interrupts when it's in a low-power state, so the TX buffer is not
      refilled until another wakeup event occurs.
      
      This fix changes the erratum i291 DMA idle workaround.  Rather than
      toggling between force-idle and no-idle, it will toggle between
      smart-idle and no-idle.  The important part of the workaround is the
      no-idle part, so this shouldn't result in any change in behavior.
      
      This fix should work on all OMAP UARTs.  Future patches intended for
      the 3.4 merge window will make this workaround conditional on a
      "feature" flag, and will use the OMAP36xx+ TX event wakeup support.
      
      Thanks to Kevin Hilman <khilman@ti.com> for mentioning the erratum i291
      workaround, which led to the development of this approach.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Alan Cox <alan@linux.intel.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Acked-by: NGovindraj.R <govindraj.raja@ti.com>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      Tested-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      be4b0281
    • R
      ARM: omap: fix oops in arch/arm/mach-omap2/vp.c when pmic is not found · d980e0f8
      Russell King 提交于
      When the PMIC is not found, voltdm->pmic will be NULL.  vp.c's
      initialization function tries to dereferences this, which causes an
      oops:
      
      Unable to handle kernel NULL pointer dereference at virtual address 00000000
      pgd = c0004000
      [00000000] *pgd=00000000
      Internal error: Oops: 5 [#1] PREEMPT
      Modules linked in:
      CPU: 0    Not tainted  (3.3.0-rc2+ #204)
      PC is at omap_vp_init+0x5c/0x15c
      LR is at omap_vp_init+0x58/0x15c
      pc : [<c03db880>]    lr : [<c03db87c>]    psr: 60000013
      sp : c181ff30  ip : c181ff68  fp : c181ff64
      r10: c0407808  r9 : c040786c  r8 : c0407814
      r7 : c0026868  r6 : c00264fc  r5 : c040ad6c  r4 : 00000000
      r3 : 00000040  r2 : 000032c8  r1 : 0000fa00  r0 : 000032c8
      Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 80004019  DAC: 00000015
      Process swapper (pid: 1, stack limit = 0xc181e2e8)
      Stack: (0xc181ff30 to 0xc1820000)
      ff20:                                     c0381d00 c02e9c6d c0383582 c040786c
      ff40: c040ad6c c00264fc c0026868 c0407814 00000000 c03d9de4 c181ff8c c181ff68
      ff60: c03db448 c03db830 c02e982c c03fdfb8 c03fe004 c0039988 00000013 00000000
      ff80: c181ff9c c181ff90 c03d9df8 c03db390 c181ffdc c181ffa0 c0008798 c03d9df0
      ffa0: c181ffc4 c181ffb0 c0055a44 c0187050 c0039988 c03fdfb8 c03fe004 c0039988
      ffc0: 00000013 00000000 00000000 00000000 c181fff4 c181ffe0 c03d1284 c0008708
      ffe0: 00000000 c03d1208 00000000 c181fff8 c0039988 c03d1214 1077ce40 01f7ee08
      Backtrace:
      [<c03db824>] (omap_vp_init+0x0/0x15c) from [<c03db448>] (omap_voltage_late_init+0xc4/0xfc)
      [<c03db384>] (omap_voltage_late_init+0x0/0xfc) from [<c03d9df8>] (omap2_common_pm_late_init+0x14/0x54)
       r8:00000000 r7:00000013 r6:c0039988 r5:c03fe004 r4:c03fdfb8
      [<c03d9de4>] (omap2_common_pm_late_init+0x0/0x54) from [<c0008798>] (do_one_initcall+0x9c/0x164)
      [<c00086fc>] (do_one_initcall+0x0/0x164) from [<c03d1284>] (kernel_init+0x7c/0x120)
      [<c03d1208>] (kernel_init+0x0/0x120) from [<c0039988>] (do_exit+0x0/0x2cc)
       r5:c03d1208 r4:00000000
      Code: e5ca300b e5900034 ebf69027 e5994024 (e5941000)
      ---[ end trace aed617dddaf32c3d ]---
      Kernel panic - not syncing: Attempted to kill init!
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d980e0f8
    • S
      ARM: 7322/1: Print BUG instead of undefined instruction on BUG_ON() · bdf800c4
      Stephen Boyd 提交于
      The ARM kernel uses undefined instructions to implement
      BUG/BUG_ON(). This leads to problems where people don't read one
      line above the Oops message and see the "kernel BUG at ..."
      message and so they wrongly assume the kernel has hit an
      undefined instruction.
      
      Instead of printing:
      
       Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP
      
      print
      
       Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
      
      This should prevent people from thinking the BUG_ON was an
      undefined instruction when it was actually intentional.
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Acked-by: NSimon Glass <sjg@chromium.org>
      Tested-by: NSimon Glass <sjg@chromium.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      bdf800c4
    • S
      ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR · b46c0f74
      Stephen Boyd 提交于
      armv7's flush_cache_all() flushes caches via set/way. To
      determine the cache attributes (line size, number of sets,
      etc.) the assembly first writes the CSSELR register to select a
      cache level and then reads the CCSIDR register. The CSSELR register
      is banked per-cpu and is used to determine which cache level CCSIDR
      reads. If the task is migrated between when the CSSELR is written and
      the CCSIDR is read the CCSIDR value may be for an unexpected cache
      level (for example L1 instead of L2) and incorrect cache flushing
      could occur.
      
      Disable interrupts across the write and read so that the correct
      cache attributes are read and used for the cache flushing
      routine. We disable interrupts instead of disabling preemption
      because the critical section is only 3 instructions and we want
      to call v7_dcache_flush_all from __v7_setup which doesn't have a
      full kernel stack with a struct thread_info.
      
      This fixes a problem we see in scm_call() when flush_cache_all()
      is called from preemptible context and sometimes the L2 cache is
      not properly flushed out.
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
      Reviewed-by: NNicolas Pitre <nico@linaro.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b46c0f74
    • M
      ARM: 7320/1: Fix proc_info table alignment · b8b9987f
      Marc Zyngier 提交于
      With an admittedly exotic choice of configuration options
      (CC_OPTIMIZE_FOR_SIZE, THUMB2, some other size-minimizing ones)
      and compiler, the proc_info table can end up being misaligned,
      and the kernel being unbootable (Error: unrecognized/unsupported
      processor variant).
      
      Forcing the alignement to 4 bytes in the linker script fixes the
      issue.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b8b9987f
  5. 07 2月, 2012 1 次提交
    • S
      perf: Fix double start/stop in x86_pmu_start() · f39d47ff
      Stephane Eranian 提交于
      The following patch fixes a bug introduced by the following
      commit:
      
              e050e3f0 ("perf: Fix broken interrupt rate throttling")
      
      The patch caused the following warning to pop up depending on
      the sampling frequency adjustments:
      
        ------------[ cut here ]------------
        WARNING: at arch/x86/kernel/cpu/perf_event.c:995 x86_pmu_start+0x79/0xd4()
      
      It was caused by the following call sequence:
      
      perf_adjust_freq_unthr_context.part() {
           stop()
           if (delta > 0) {
                perf_adjust_period() {
                    if (period > 8*...) {
                        stop()
                        ...
                        start()
                    }
                }
            }
            start()
      }
      
      Which caused a double start and a double stop, thus triggering
      the assert in x86_pmu_start().
      
      The patch fixes the problem by avoiding the double calls. We
      pass a new argument to perf_adjust_period() to indicate whether
      or not the event is already stopped. We can't just remove the
      start/stop from that function because it's called from
      __perf_event_overflow where the event needs to be reloaded via a
      stop/start back-toback call.
      
      The patch reintroduces the assertion in x86_pmu_start() which
      was removed by commit:
      
      	84f2b9b2 ("perf: Remove deprecated WARN_ON_ONCE()")
      
      In this second version, we've added calls to disable/enable PMU
      during unthrottling or frequency adjustment based on bug report
      of spurious NMI interrupts from Eric Dumazet.
      Reported-and-tested-by: NEric Dumazet <eric.dumazet@gmail.com>
      Signed-off-by: NStephane Eranian <eranian@google.com>
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: markus@trippelsdorf.de
      Cc: paulus@samba.org
      Link: http://lkml.kernel.org/r/20120207133956.GA4932@quad
      [ Minor edits to the changelog and to the code ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f39d47ff
  6. 05 2月, 2012 2 次提交
  7. 04 2月, 2012 4 次提交
  8. 03 2月, 2012 6 次提交
    • W
      ARM: 7314/1: kuser: consistently use usr_ret for returning from helpers · 5a97d0ae
      Will Deacon 提交于
      __kuser_cmpxchg64 has a return path using bx lr to get back to the caller.
      This is actually ok since the code in question is predicated on
      CONFIG_CPU_32v6K, but for the sake of consistency using the usr_ret
      macro is probably better.
      Acked-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      5a97d0ae
    • S
      perf: Remove deprecated WARN_ON_ONCE() · 84f2b9b2
      Stephane Eranian 提交于
      With the new throttling/unthrottling code introduced with
      commit:
      
        e050e3f0 ("perf: Fix broken interrupt rate throttling")
      
      we occasionally hit two WARN_ON_ONCE() checks in:
      
        - intel_pmu_pebs_enable()
        - intel_pmu_lbr_enable()
        - x86_pmu_start()
      
      The assertions are no longer problematic. There is a valid
      path where they can trigger but it is harmless.
      
      The assertion can be triggered with:
      
        $ perf record -e instructions:pp ....
      
      Leading to paths:
      
        intel_pmu_pebs_enable
        intel_pmu_enable_event
        x86_perf_event_set_period
        x86_pmu_start
        perf_adjust_freq_unthr_context
        perf_event_task_tick
        scheduler_tick
      
      And:
      
        intel_pmu_lbr_enable
        intel_pmu_enable_event
        x86_perf_event_set_period
        x86_pmu_start
        perf_adjust_freq_unthr_context.
        perf_event_task_tick
        scheduler_tick
      
      cpuc->enabled is always on because when we get to
      perf_adjust_freq_unthr_context() the PMU is not totally
      disabled. Furthermore when we need to adjust a period,
      we only stop the event we need to change and not the
      entire PMU. Thus, when we re-enable, cpuc->enabled is
      already set. Note that when we stop the event, both
      pebs and lbr are stopped if necessary (and possible).
      Signed-off-by: NStephane Eranian <eranian@google.com>
      Cc: peterz@infradead.org
      Link: http://lkml.kernel.org/r/20120202110401.GA30911@quadSigned-off-by: NIngo Molnar <mingo@elte.hu>
      84f2b9b2
    • C
      ARM: 7302/1: Add TLB flushing for both entries in a PMD · 6d3ec1ae
      Catalin Marinas 提交于
      Linux uses two PMD entries for a PTE with the classic page table format,
      covering 2MB range. However, the __pte_free_tlb() function only adds a
      single TLB flush corresponding to 1MB range covering 'addr'. On
      Cortex-A15, level 1 entries can be cached by the TLB independently of
      the level 2 entries and without additional flushing a PMD entry would be
      left pointing at the wrong PTE. The patch limits the TLB flushing range
      to two 4KB pages around the 1MB boundary within PMD.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      6d3ec1ae
    • W
      ARM: 7303/1: perf: add empty NODE event definitions for Cortex-A5 and Cortex-A15 · 91756acb
      Will Deacon 提交于
      Commit 89d6c0b5 ("perf, arch: Add generic NODE cache events") added
      empty NODE event definitions for the ARM PMU implementations. This was
      merged along with Cortex-A5 and Cortex-A15 PMU support, so they missed
      out on the original patch.
      
      This patch adds the empty definitions to Cortex-A5 and Cortex-A15.
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      91756acb
    • W
      ARM: 7308/1: vfp: flush thread hwstate before copying ptrace registers · 8130b9d7
      Will Deacon 提交于
      If we are context switched whilst copying into a thread's
      vfp_hard_struct then the partial copy may be corrupted by the VFP
      context switching code (see "ARM: vfp: flush thread hwstate before
      restoring context from sigframe").
      
      This patch updates the ptrace VFP set code so that the thread state is
      flushed before the copy, therefore disabling VFP and preventing
      corruption from occurring.
      
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8130b9d7
    • D
      ARM: 7307/1: vfp: fix ptrace regset modification race · 247f4993
      Dave Martin 提交于
      In a preemptible kernel, vfp_set() can be preempted, causing the
      hardware VFP context to be switched while the thread vfp state is
      being read and modified.  This leads to a race condition which can
      cause the thread vfp state to become corrupted if lazy VFP context
      save occurs due to preemption in between the time thread->vfpstate
      is read and the time the modified state is written back.
      
      This may occur if preemption occurs during the execution of a
      ptrace() call which modifies the VFP register state of a thread.
      Such instances should be very rare in most realistic scenarios --
      none has been reported, so far as I am aware.  Only uniprocessor
      systems should be affected, since VFP context save is not currently
      lazy in SMP kernels.
      
      The problem was introduced by my earlier patch migrating to use
      regsets to implement ptrace.
      
      This patch does a vfp_sync_hwstate() before reading
      thread->vfpstate, to make sure that the thread's VFP state is not
      live in the hardware registers while the registers are modified.
      
      Thanks to Will Deacon for spotting this.
      
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      247f4993