1. 04 7月, 2006 1 次提交
  2. 27 6月, 2006 2 次提交
  3. 26 3月, 2006 1 次提交
  4. 05 2月, 2006 1 次提交
  5. 02 2月, 2006 1 次提交
  6. 12 1月, 2006 3 次提交
  7. 15 11月, 2005 1 次提交
  8. 03 11月, 2005 1 次提交
  9. 15 9月, 2005 1 次提交
    • D
      [LIB]: Consolidate _atomic_dec_and_lock() · 4db2ce01
      David S. Miller 提交于
      Several implementations were essentialy a common piece of C code using
      the cmpxchg() macro.  Put the implementation in one spot that everyone
      can share, and convert sparc64 over to using this.
      
      Alpha is the lone arch-specific implementation, which codes up a
      special fast path for the common case in order to avoid GP reloading
      which a pure C version would require.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4db2ce01
  10. 10 9月, 2005 1 次提交
  11. 31 7月, 2005 1 次提交
  12. 29 7月, 2005 1 次提交
  13. 24 6月, 2005 1 次提交
    • V
      [PATCH] Platform SMIs and their interferance with tsc based delay calibration · 8a9e1b0f
      Venkatesh Pallipadi 提交于
      Issue:
      Current tsc based delay_calibration can result in significant errors in
      loops_per_jiffy count when the platform events like SMIs
      (System Management Interrupts that are non-maskable) are present. This could
      lead to potential kernel panic(). This issue is becoming more visible with 2.6
      kernel (as default HZ is 1000) and on platforms with higher SMI handling
      latencies. During the boot time, SMIs are mostly used by BIOS (for things
      like legacy keyboard emulation).
      
      Description:
      The psuedocode for current delay calibration with tsc based delay looks like
      (0) Estimate a value for loops_per_jiffy
      (1) While (loops_per_jiffy estimate is accurate enough)
      (2)   wait for jiffy transition (jiffy1)
      (3)   Note down current tsc (tsc1)
      (4)   loop until tsc becomes tsc1 + loops_per_jiffy
      (5)   check whether jiffy changed since jiffy1 or not and refine
      loops_per_jiffy estimate
      
      Consider the following cases
      Case 1:
      If SMIs happen between (2) and (3) above, we can end up with a
      loops_per_jiffy value that is too low. This results in shorted delays and
      kernel can panic () during boot (Mostly at IOAPIC timer initialization
      timer_irq_works() as we don't have enough timer interrupts in a specified
      interval).
      
      Case 2:
      If SMIs happen between (3) and (4) above, then we can end up with a
      loops_per_jiffy value that is too high. And with current i386 code, too
      high lpj value (greater than 17M) can result in a overflow in
      delay.c:__const_udelay() again resulting in shorter delay and panic().
      
      Solution:
      The patch below makes the calibration routine aware of asynchronous events
      like SMIs. We increase the delay calibration time and also identify any
      significant errors (greater than 12.5%) in the calibration and notify it to
      user.
      
      Patch below changes both i386 and x86-64 architectures to use this
      new and improved calibrate_delay_direct() routine.
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8a9e1b0f
  14. 22 6月, 2005 1 次提交
    • I
      [PATCH] smp_processor_id() cleanup · 39c715b7
      Ingo Molnar 提交于
      This patch implements a number of smp_processor_id() cleanup ideas that
      Arjan van de Ven and I came up with.
      
      The previous __smp_processor_id/_smp_processor_id/smp_processor_id API
      spaghetti was hard to follow both on the implementational and on the
      usage side.
      
      Some of the complexity arose from picking wrong names, some of the
      complexity comes from the fact that not all architectures defined
      __smp_processor_id.
      
      In the new code, there are two externally visible symbols:
      
       - smp_processor_id(): debug variant.
      
       - raw_smp_processor_id(): nondebug variant. Replaces all existing
         uses of _smp_processor_id() and __smp_processor_id(). Defined
         by every SMP architecture in include/asm-*/smp.h.
      
      There is one new internal symbol, dependent on DEBUG_PREEMPT:
      
       - debug_smp_processor_id(): internal debug variant, mapped to
                                   smp_processor_id().
      
      Also, i moved debug_smp_processor_id() from lib/kernel_lock.c into a new
      lib/smp_processor_id.c file.  All related comments got updated and/or
      clarified.
      
      I have build/boot tested the following 8 .config combinations on x86:
      
       {SMP,UP} x {PREEMPT,!PREEMPT} x {DEBUG_PREEMPT,!DEBUG_PREEMPT}
      
      I have also build/boot tested x64 on UP/PREEMPT/DEBUG_PREEMPT.  (Other
      architectures are untested, but should work just fine.)
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NArjan van de Ven <arjan@infradead.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      39c715b7
  15. 23 4月, 2005 1 次提交
  16. 21 4月, 2005 1 次提交
  17. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4