- 04 2月, 2010 2 次提交
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由 Mark Brown 提交于
At the minute the regulators are simply enabled for the entire lifetime of the device. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Saves a little bit of code duplication. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 02 2月, 2010 5 次提交
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由 Joonyoung Shim 提交于
This fixes BCLK calculation and removes unnecessary check code. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
The dependency on MFD_WM8994 rather than I2C went awry. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
The WM8994 is a highly integrated ultra-low power hi-fi audio subsystem designed for smartphones and other portable devices rich in multimedia features. It provides advanced digital mixing facilities enabling low power high quality interconnection of CPU, baseband and other audio sources through flexible digital and analogue routing, and integrates a class W headphone driver and stereo class D speaker drivers. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Use a two code correction for optimal performance. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Perform DC servo offset calibration using a series update sequence rather than startup update sequence, tuning the configuration of the WM8993 DC servo to make best use of this. Also introduce currently unused data allowing us to correct for any systematic errors in the DC servo calibration results and an alternative startup path for the headphone output which performs better with some chip revisions. The alternative setup sequence is enabled for WM8993. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 01 2月, 2010 1 次提交
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由 Guennadi Liakhovetski 提交于
In case, if OPCLK is not used, and PLL is used for driving the codec, the choice of PLL output frequency could result in a needlessly imprecise system clock frequency. Use an iterative process to select a precise configuration. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 29 1月, 2010 3 次提交
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由 Guennadi Liakhovetski 提交于
wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their .set_clkdiv() methods, which is wrong, because these are simple boolean switches and not clock dividers. Move these bits to sound controls. Also remove manual configuration of the MCLK divider in wm8978, since it is configured automatically. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Guennadi Liakhovetski 提交于
Tests showed, that bit 6 of the WM8978_POWER_MANAGEMENT_2 register of wm8978 affects codec clocks. Being useless for suspend / resume, it cannot be used in bias-level control either. Remove this bit handling. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Anuj Aggarwal 提交于
Commit e9ff5eb2 (Fixing infinite loop in resume path) uses wrong AIC23 register in resume function because of which register writes happen on some non-existing registers. Signed-off-by: NAnuj Aggarwal <anuj.aggarwal@ti.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 28 1月, 2010 4 次提交
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由 Mark Brown 提交于
Also renames a few things to make volumes and switches match up in alsamixer. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
The version isn't being updated or used, the kernel revision tracking is enough. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Change the legacy default register configuration, which left some internal components on. Now we have either DAPM, or other ways to control these bits, so there is no need to enable them by default. The affected parts: Disable ADCL and ADCR Disable ARXL2 and ARXR2 analog PGA (playback) Disable APLL by default Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Guennadi Liakhovetski 提交于
The WM8978 codec from Wolfson Microelectronics is very similar to wm8974, but is stereo and also has some differences in pin configuration and internal signal routing. This driver is based on wm8974 and takes the differences into account. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 27 1月, 2010 2 次提交
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由 Barry Song 提交于
Signed-off-by: NBarry Song <Barry.Song@analog.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Barry Song 提交于
Signed-off-by: NBarry Song <Barry.Song@analog.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 25 1月, 2010 2 次提交
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由 Barry Song 提交于
tests show frequent suspend/resume(frequent poweroff/on ad1836 internal components) maybe make ad1836 clock mode wrong sometimes after wakeup. This patch reset/restore ad1836 clock mode while executing PM, then ad1836 can always resume to right clock status. Signed-off-by: NBarry Song <21cnbao@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Guennadi Liakhovetski 提交于
Remember to free the temporary register-cache. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
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- 21 1月, 2010 1 次提交
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由 Mark Brown 提交于
This provides a small power saving when audio is inactive. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 20 1月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Add possibility to configure the burst mode BCLK divider through platform data structure. The BCLK divider changes the actual speed of the serial bus in burst mode, which is faster than the sampling frequency of the running stream. In this way platforms can experiment with the optimal burst speed without the need to modify the codec driver itself. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
The BCLK divider was not configured in case of mode7. This leads to unpredictable behavior when switching between FIFO modes. Configure the BCLK divider depending on the fifo_mode (FIFO is in use, or FIFO bypass). Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 19 1月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Set the prefill number of samples as the same as the lower threshold in mode7. In this way the codec will read the same amount of data on startup and during the running playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 16 1月, 2010 1 次提交
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由 Daniel Mack 提交于
For setups with variable MCLKs, the current logic of limiting the available sampling rates at startup time is not sufficient. We need to be able to change the setting at a later point, and so the codec must offer all possible rates until the hw_params are given. This patches allows that by passing 0 as 'freq' argument to cs4270_set_dai_sysclk(). Signed-off-by: NDaniel Mack <daniel@caiaq.de> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 1月, 2010 1 次提交
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由 Thomas Weber 提交于
Signed-off-by: NThomas Weber <weber@corscience.de> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 1月, 2010 2 次提交
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由 Daniel Mack 提交于
The transmitter supports all sample rates up to 192KHz, so the driver should not give a limit. Signed-off-by: NDaniel Mack <daniel@caiaq.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
The codec structure initialization statements should be separated by semicolons. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 1月, 2010 3 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
This reverts commit afe1c2cd since it doesn't build.
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由 Ilkka Koskinen 提交于
tpa6140a2 uses different names for the regulators. Signed-off-by: NIlkka Koskinen <ilkka.koskinen@nokia.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 09 1月, 2010 1 次提交
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由 Mark Brown 提交于
We need to set the LRCLK inversion bit to select DSP mode. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Cc: stable@kernel.org
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- 05 1月, 2010 7 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Manuel Lauss 提交于
Initialize the glue by calling snd_soc_new_ac97_codec() as is done in other ASoC AC97 codecs. Fixes an oops caused by dereferencing uninitialized members in snd_soc_new_pcms(). Run-tested on Au1250. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Ilkka Koskinen 提交于
Signed-off-by: NIlkka Koskinen <ilkka.koskinen@nokia.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 12月, 2009 2 次提交
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由 Mark Brown 提交于
Better integration of the core with the device model means that we now no longer get the ASoC suspend and resume callbacks without the card having been set up. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
The currently available FIFO modes (mode1 and mode7) require master mode from the codec. Do not allow the slave configuration when the FIFO is in use. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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