- 05 6月, 2015 1 次提交
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由 James Liao 提交于
The size of clk_data should be the same as CLK_APMIXED_NR_CLK instead of ARRAY_SIZE(plls). CLK_APMIXED_* is numbered from 1, so CLK_APMIXED_NR_CLK will be greater than ARRAY_SIZE(plls). Signed-off-by: NJames Liao <jamesjj.liao@mediatek.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 20 5月, 2015 1 次提交
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由 Ricky Liang 提交于
The variable init (struct clk_init_data) is allocated on the stack. We weren't initializing the .flags field, so it contains random junk, which can cause all kinds of interesting issues when the flags are parsed by clk_register. Signed-off-by: NRicky Liang <jcliang@chromium.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 06 5月, 2015 4 次提交
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由 James Liao 提交于
This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs, INFRA and PERI clocks. Signed-off-by: NJames Liao <jamesjj.liao@mediatek.com> Signed-off-by: NHenry Chen <henryc.chen@mediatek.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 James Liao 提交于
This patch adds basic clocks for MT8135, including TOPCKGEN, PLLs, INFRA and PERI clocks. Signed-off-by: NJames Liao <jamesjj.liao@mediatek.com> Signed-off-by: NHenry Chen <henryc.chen@mediatek.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Sascha Hauer 提交于
The pericfg and infracfg units also provide reset lines to several other SoC internal units. This adds a function which can be called from the pericfg and infracfg initialization functions which will register the reset controller using reset_controller_register. The reset controller will provide support for resetting the units connected to the pericfg and infracfg controller. The units resetted by this controller can use the standard reset device tree binding to gain access to the reset lines. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 James Liao 提交于
This patch adds common clock support for Mediatek SoCs, including plls, muxes and clock gates. Signed-off-by: NJames Liao <jamesjj.liao@mediatek.com> Signed-off-by: NHenry Chen <henryc.chen@mediatek.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> [sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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