1. 28 10月, 2016 3 次提交
  2. 27 10月, 2016 6 次提交
  3. 26 10月, 2016 19 次提交
  4. 25 10月, 2016 12 次提交
    • C
      dma-buf: Rename struct fence to dma_fence · f54d1867
      Chris Wilson 提交于
      I plan to usurp the short name of struct fence for a core kernel struct,
      and so I need to rename the specialised fence/timeline for DMA
      operations to make room.
      
      A consensus was reached in
      https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
      that making clear this fence applies to DMA operations was a good thing.
      Since then the patch has grown a bit as usage increases, so hopefully it
      remains a good thing!
      
      (v2...: rebase, rerun spatch)
      v3: Compile on msm, spotted a manual fixup that I broke.
      v4: Try again for msm, sorry Daniel
      
      coccinelle script:
      @@
      
      @@
      - struct fence
      + struct dma_fence
      @@
      
      @@
      - struct fence_ops
      + struct dma_fence_ops
      @@
      
      @@
      - struct fence_cb
      + struct dma_fence_cb
      @@
      
      @@
      - struct fence_array
      + struct dma_fence_array
      @@
      
      @@
      - enum fence_flag_bits
      + enum dma_fence_flag_bits
      @@
      
      @@
      (
      - fence_init
      + dma_fence_init
      |
      - fence_release
      + dma_fence_release
      |
      - fence_free
      + dma_fence_free
      |
      - fence_get
      + dma_fence_get
      |
      - fence_get_rcu
      + dma_fence_get_rcu
      |
      - fence_put
      + dma_fence_put
      |
      - fence_signal
      + dma_fence_signal
      |
      - fence_signal_locked
      + dma_fence_signal_locked
      |
      - fence_default_wait
      + dma_fence_default_wait
      |
      - fence_add_callback
      + dma_fence_add_callback
      |
      - fence_remove_callback
      + dma_fence_remove_callback
      |
      - fence_enable_sw_signaling
      + dma_fence_enable_sw_signaling
      |
      - fence_is_signaled_locked
      + dma_fence_is_signaled_locked
      |
      - fence_is_signaled
      + dma_fence_is_signaled
      |
      - fence_is_later
      + dma_fence_is_later
      |
      - fence_later
      + dma_fence_later
      |
      - fence_wait_timeout
      + dma_fence_wait_timeout
      |
      - fence_wait_any_timeout
      + dma_fence_wait_any_timeout
      |
      - fence_wait
      + dma_fence_wait
      |
      - fence_context_alloc
      + dma_fence_context_alloc
      |
      - fence_array_create
      + dma_fence_array_create
      |
      - to_fence_array
      + to_dma_fence_array
      |
      - fence_is_array
      + dma_fence_is_array
      |
      - trace_fence_emit
      + trace_dma_fence_emit
      |
      - FENCE_TRACE
      + DMA_FENCE_TRACE
      |
      - FENCE_WARN
      + DMA_FENCE_WARN
      |
      - FENCE_ERR
      + DMA_FENCE_ERR
      )
       (
       ...
       )
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: NSumit Semwal <sumit.semwal@linaro.org>
      Acked-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
      f54d1867
    • C
      drm/i915: Include the kernel uptime in the error state · de867c20
      Chris Wilson 提交于
      As well as knowing when the error occurred, it is more interesting to me
      to know how long after booting the error occurred, and for good measure
      record the time since last hw initialisation.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NMatthew Auld <matthew.auld@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025121602.1457-1-chris@chris-wilson.co.uk
      de867c20
    • A
      drm/i915: Mark the GuC log buffer flush interrupts handling WQ as freezable · 7ef54de7
      Akash Goel 提交于
      The GuC log buffer flush work item has to do a register access to send the
      ack to GuC and this work item, if not synced before suspend, can potentially
      get executed after the GFX device is suspended. This work item function uses
      rpm get/put calls around the Hw access, which covers the rpm suspend case
      but for system suspend a sync would be required as kernel can potentially
      schedule the work items even after some devices, including GFX, have been
      put to suspend. But sync has to be done only for the system suspend case,
      as sync along with rpm get/put can cause a deadlock for rpm suspend path.
      To have the sync, but like a NOOP, for rpm suspend path also this work
      item could have been queued from the irq handler only when the device is
      runtime active & kept active while that work item is pending or getting
      executed but an interrupt can come even after the device is out of use and
      so can potentially lead to missing of this work item.
      
      By marking the workqueue, dedicated for handling GuC log buffer flush
      interrupts, as freezable we don't have to bother about flushing of this
      work item from the suspend hooks, the pending work item if any will be
      either executed before the suspend or scheduled later on resume. This way
      the handling of log buffer flush work item can be kept same between system
      suspend & rpm suspend.
      Suggested-by: NImre Deak <imre.deak@intel.com>
      Cc: Imre Deak <imre.deak@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      7ef54de7
    • A
      drm/i915: Early creation of relay channel for capturing boot time logs · 1e6b8b0d
      Akash Goel 提交于
      As per the current i915 Driver load sequence, debugfs registration is done
      at the end and so the relay channel debugfs file is also created after that
      but the GuC firmware is loaded much earlier in the sequence.
      As a result Driver could miss capturing the boot-time logs of GuC firmware
      if there are flush interrupts from the GuC side.
      Relay has a provision to support early logging where initially only relay
      channel can be created, to have buffers for storing logs, and later on
      channel can be associated with a debugfs file at appropriate time.
      Have availed that, which allows Driver to capture boot time logs also,
      which can be collected once Userspace comes up.
      
      v2:
      - Remove the couple of FIXMEs, as now the relay channel will be created
        early before enabling the flush interrupts, so no possibility of relay
        channel pointer being modified & read at the same time from 2 different
        execution contexts.
      - Rebase.
      
      v3:
      - Add a comment to justiy setting 'is_global' before the NULL check on the
        parent directory dentry pointer.
      Suggested-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      1e6b8b0d
    • A
      drm/i915: Use SSE4.1 movntdqa based memcpy for sampling GuC log buffer · 71706590
      Akash Goel 提交于
      To ensure that we always get the up-to-date data from log buffer, its
      better to access the buffer through an uncached CPU mapping. Also the way
      buffer is accessed from GuC & Host side, manually doing cache flush may
      not be effective always if cached CPU mapping is used. In order to avoid
      any performance drop & have fast reads from the GuC log buffer, used SSE4.1
      movntdqa based memcpy function i915_memcpy_from_wc, as copying using
      movntqda from WC type memory is almost as fast as reading from WB memory.
      This way log buffer sampling time will not get increased and so would be
      able to deal with the flush interrupt storm when GuC is generating logs at
      a very high rate.
      Ideally SSE 4.1 should be present on all chipsets supporting GuC based
      submisssions, but if not then logging will not be enabled.
      
      v2: Rebase.
      
      v3: Squash the WC type vmalloc mapping patch with this patch. (Chris)
      Suggested-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      71706590
    • S
      drm/i915: Debugfs support for GuC logging control · 685534ef
      Sagar Arun Kamble 提交于
      This patch provides debugfs interface i915_guc_output_control for
      on the fly enabling/disabling of logging in GuC firmware and controlling
      the verbosity level of logs.
      The value written to the file, should have bit 0 set to enable logging and
      bits 4-7 should contain the verbosity info.
      
      v2: Add a forceful flush, to collect left over logs, on disabling logging.
          Useful for Validation.
      
      v3: Besides minor cleanup, implement read method for the debugfs file and
          set the guc_log_level to -1 when logging is disabled. (Tvrtko)
      
      v4: Minor cleanup & rebase. (Tvrtko)
      
      v5:
      - Lock struct_mutex after the NULL check for guc log buffer vma. (Chris)
      - Rebase.
      Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      685534ef
    • S
      drm/i915: Support for forceful flush of GuC log buffer · 896a0cb0
      Sagar Arun Kamble 提交于
      GuC firmware sends a flush interrupt to Host when the log buffer is half
      full and at that time only it updates the log buffer state.
      But in certain cases, as described below, it could be useful to have all
      that even when log buffer is only partially full. For that there is a force
      log buffer flush Host2GuC action supported by GuC firmware.
      
      For Validation requirements, a forceful flush is needed to collect the
      left over logs on disabling logging. The same can be done before proceeding
      with GPU/GuC reset as there could be some data in log buffer which is yet
      to be captured and those logs would be particularly useful to understand
      that why the reset was initiated.
      Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      896a0cb0
    • A
      drm/i915: Augment i915 error state to include the dump of GuC log buffer · 27b85bea
      Akash Goel 提交于
      Added the dump of GuC log buffer to i915 error state, as the contents of
      GuC log buffer would also be useful to determine that why the GPU reset
      was triggered.
      
      v2:
      - For uniformity use existing helper function print_error_obj() to
        dump out contents of GuC log buffer, pretty printing is better left
        to userspace. (Chris)
      - Skip the dumping of GuC log buffer when logging is disabled as it
        won't be of any use.
      - Rebase.
      
      v3: Rebase.
      Suggested-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      27b85bea
    • A
      drm/i915: Increase GuC log buffer size to reduce flush interrupts · 72c0bc66
      Akash Goel 提交于
      In cases where GuC generate logs at a very high rate, correspondingly
      the rate of flush interrupts is also very high.
      So far total 8 pages were allocated for storing both ISR & DPC logs.
      As per the half-full draining protocol followed by GuC, by doubling
      the number of pages, the frequency of flush interrupts can be cut down
      to almost half, which then helps in reducing the logging overhead.
      So now allocating 8 pages apiece for ISR & DPC logs.
      This also helps in reducing the output log file size, apart from
      reducing the flush interrupt count. With the original settings,
      44 KB was needed for one snapshot. With modified settings, 76 KB is
      needed for a snapshot which will be equivalent to 2 snapshots of the
      original setting. So 12KB saving, every 88 KB, over the original setting.
      Suggested-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      72c0bc66
    • A
      drm/i915: Optimization to reduce the sampling time of GuC log buffer · 6941f3c9
      Akash Goel 提交于
      GuC firmware sends an interrupt to flush the log buffer when it becomes
      half full, so Driver doesn't really need to sample the complete buffer
      and can just copy only the newly written data by GuC into the local
      buffer, i.e. as per the read & write pointer values.
      Moreover the flush interrupt would generally come for one type of log
      buffer, when it becomes half full, so at that time the other 2 types of
      log buffer would comparatively have much lesser unread data in them.
      In case of overflow reported by GuC, Driver do need to copy the entire
      buffer as the whole buffer would contain the unread data.
      
      v2: Rebase.
      
      v3: Fix the blooper of doing the copy twice. (Tvrtko)
      
      v4: Add curlies for 'else' case also, matching the 'if'. (Tvrtko)
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      6941f3c9
    • A
      drm/i915: Add stats for GuC log buffer flush interrupts · 5aa1ee4b
      Akash Goel 提交于
      GuC firmware sends an interrupt to flush the log buffer when it
      becomes half full. GuC firmware also tracks how many times the
      buffer overflowed.
      It would be useful to maintain a statistics of how many flush
      interrupts were received and for which type of log buffer,
      along with the overflow count of each buffer type.
      Augmented i915_log_info debugfs to report back these statistics.
      
      v2:
      - Update the logic to detect multiple overflows between the 2
        flush interrupts and also log a message for overflow (Tvrtko)
      - Track the number of times there was no free sub buffer to capture
        the GuC log buffer. (Tvrtko)
      
      v3:
      - Fix the printf field width for overflow counter, set it to 10 as per the
        max value of u32, which takes 10 digits in decimal form. (Tvrtko)
      
      v4:
      - Move the log buffer overflow handling to a new function for better
        readability. (Tvrtko)
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      5aa1ee4b
    • A
      drm/i915: New lock to serialize the Host2GuC actions · 5dd7989b
      Akash Goel 提交于
      With the addition of new Host2GuC actions related to GuC logging, there
      is a need of a lock to serialize them, as they can execute concurrently
      with each other and also with other existing actions.
      
      v2: Use mutex in place of spinlock to serialize, as sleep can happen
          while waiting for the action's response from GuC. (Tvrtko)
      
      v3: To conform to the general rules, acquire mutex before taking the
          forcewake. (Tvrtko)
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      5dd7989b