Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of
the hardcoded clock number.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Embest MarS Board [1] is a multi-core platform based on Freescale i.MX6
Cortex-A9 Dual Core, running up to 1GHz with 1 GB of RAM, 4GB of eMMC
and with a 4MB SPI flash.

[1] http://www.embest-tech.com/shop/star/marsboard.htmlSigned-off-by: NSergio Prado <sergio.prado@e-labworks.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

When compiled with "W=1", dtc complains: e.g.
"Warning (unit_address_vs_reg):
Node /soc/ipu@02800000/port@2/endpoint@0
has a unit name, but no reg property"

Endpoint nodes don't have a reg property, and the addresses
in their node names are ordinals without any special meaning
so remove them and swap them for semantic node names.
Signed-off-by: NJoshua Clayton <stillcompiling@gmail.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf

states the following:

"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."

So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

198MHz is a valid operating point for mx6sx.

Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf

(a 25mV offset is added to the minimum allowed values for safety).

These values also match the ones from the NXP kernel.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf

(a 25mV offset is added to the minimum allowed values for safety).
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The BA16 module has a PMIC that uses the WDOG_B output from iMX6 to
reset the system on a watchdog timeout. Configure the watchdog to assert
the external reset signal (WDOG_B) using fsl,ext-reset-output property.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Previously the LDB_DIx clocks could be specified in the ldb node. With
the ERR009219 errata fix applied, the ldb_di clocks now needs to be
specified in the clks node to ensure the clocks are setup early in the
boot process.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The default monitor that ships with B850v3 requires a 65MHz pixel clock.
65MHz can not be achieved using PLL3 (480MHz/7=68.5MHz). Hence set the
LDB_DIx clock source to PLL5. Since PLL5 is already in use by IPU1_DIx,
set the clock source for IPU1_DIx to PLL2_PFD2 to allow simultaneous
display on both LVDS and HDMI interface.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Remove ldb panel entry for the following reasons:
- The b850v3 has an onboard LVDS to DisplayPort converter (STDP4028). So
we should not limit the monitors that can be connected by hardcoding the
auo,b133htn01 1080p panel.
- The default resolution on the LVDS interface needs to be WXGA or less.
Otherwise when a 1080p monitor is connected to the HDMI port there is no
output on both the LVDS and HDMI ports since a single IPU on i.MX6 can
not handle two 1080p displays. With the panel entry removed from the
devicetree, drm driver defaults the resolution on LVDS interface to XGA.

Once in userspace, applications can set the desired resolution on LVDS
interface over IPU2 CRTC.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The official UDOO board kit has 7 and 15.6 inch touchscreen LCD panels
as options.

This patch adds support for 7 inch panel only, but the 15.6 inch one
should be easy to add using the same regulator, backlight device and
LVDS channel.

Since this panel is an option for UDOO board it is disabled by default
and can be enabled (for example) by the following U-Boot commands:
fdt set backlight status okay
fdt set panelchan status okay
fdt set panel7 status okay
fdt set touchscreenp7 status okay

The LVDS channels is also disabled by default to avoid warning from its
driver.
Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add the Keypad Port (KPP) devicetree nodes for IMX31 and IMX35 SOC.
Signed-off-by: NAlexander Kurz <akurz@blala.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The DCU IP has distinct clock inputs for register access and the
pixel clocks, at least in some implementations. LS1021a seems to
use the same clock, therefore specify the same clock for "dcu"
and "pix".
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Both DSPI have signals SPIn_PCS[0:5] so in summary 6 chip-selects, not 5.
Fix that.
Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add gpio nodes for ls1021a platform dts file. The gpio
IP block of the ls1021a can be supported by the code
drivers/gpio/gpio-mpc8xxx.c.

The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.

The chip-specific compatible "fsl,ls1021a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.
Signed-off-by: NLiu Gang <Gang.Liu@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The vqmmc supply is not connected to bio supply on the BA16 module.
Hence remove vqmmc-supply property in usdhc3 node.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add SCFG MSI dts node and add msi-parent property to PCIe dts node
that points to the corresponding MSI node.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Tested-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

According to Documentation/devicetree/bindings/net/fsl-fec.txt the polarity
of "phy-reset-gpios" is assumed to be active-low unless a separate property
"phy-reset-active-high" is available. So replace the inconsistent polarity
description to make the correct active-low reset behavior more obvious.
Signed-off-by: NSoeren Moch <smoch@web.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This commit adds support for Rev. B of a Zodiac Inflight Innovations
development board, mainly intended for DSA and ARINC 429 development
work.
Signed-off-by: NCory Tusar <cory.tusar@pid1solutions.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add missing reg properties to AIPS bus and Cortex-A5's PMU unit.
This change avoids the following warnings:
 Warning (unit_address_vs_reg): Node /soc/aips-bus@40000000 has a unit
 name, but no reg property
 Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000 has a unit
 name, but no reg property
 Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000/pmu@40089000
 has a unit name, but no reg property
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The NAND flash memory populated on Colibri VF61 allows faster NAND
timings than the flash memory on VF50. Additionally, due to divider
limitations, VF61 did clock the flash even slower than VF50. Assign
the NFC clock in the module specific device trees vf500-colibri.dtsi
and vf610-colibri.dtsi respectively.

This increases raw read speed on Colibri VF61 by about 20%.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The Vybrid based Colibri modules provide a on-module PHY which is
connected to the second FEC instance FEC1. Since the on-module
Ethernet port is considered as primary ethernet interface, alias
fec1 as ethernet0. This also makes sure that the first MAC address
provided by the boot loader gets assigned to the FEC instance used
for the on-module PHY.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Introduce imx6sx-sdb-sai.dts so that it is possible to use the
SAI interface.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Document the 'fsl,sdma-event-remap' property and provide an example of
its usage.

Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Property 'dma-source' is not used anywhere, nor it is documented, so
let's just get rid of it.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h
IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly.
Suggested-by: NZidan Wang <zidan.wang@nxp.com>
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

pwm2 is provided on the BA16 Q7 module, but is not used on any
of the current configurations. However, future platforms may
utilize this device, so we are simply disabling the node rather
than removing it completely.
Signed-off-by: NJustin Waters <justin.waters@timeys.com>
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Based on i.MX6 SoloX with 1GB of RAM.

https://boundarydevices.com/product/nit6_solox-imx6/Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

It is preferred to use the panel compatible string rather than passing the
LCD timings in the device tree.

So pass the "hannstar,hsd100pxn1" compatible string to describe
the LVDS panel on this board.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This baseboard can be used with all TX6 SoMs, but only a certain set
of combinations can be ordered by default. Add support for these
combinations in mainline, so that users can easily adopt their own
combination of SoM and baseboard themselves.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for the following i.MX6 based modules from Ka-Ro
electronics GmbH:
TX6S-8034:
Processor    Freescale i.MX 6 Solo, 800MHz
RAM          256MiB DDR3 SDRAM
ROM          128MiB NAND Flash
Power supply Single 3.1V to 5.5V
Size         31mm SO-DIMM
Temp. Range  industrial grade (-40°C/-25°C to 105°C Tj)

TX6S-8035:
Processor    Freescale i.MX 6 Solo, 800MHz
RAM          512MiB DDR3 SDRAM
ROM          4GiB eMMC
Power supply Single 3.1V to 5.5V
Size         31mm SO-DIMM
Temp. Range  industrial grade (-40°C/-25°C to 105°C Tj)

TX6U-8033:
Processor    Freescale i.MX 6 Dual Lite, 800MHz
RAM          1GiB DDR3 SDRAM
ROM          4GiB eMMC
Power supply Single 3.1V to 5.5V
Size         31mm SO-DIMM
Temp. Range  industrial grade (-40°C/-25°C to 105°C Tj)

TX6Q-1036:
Processor    Freescale i.MX 6Quad, 1GHz
RAM          1GB DDR3 SDRAM 64-bit
ROM          8GiB eMMC
Power supply Single 3.1V to 5.5V
Size         31mm SO-DIMM
Temp. Range  Extended Consumer Grade (-20°C to 105°C Tj)
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add missing pinctrl for the RTS/CTS lines to uart1 and set the
fsl,uart-has-rtscts property on all UARTs to enable support for HW
handshake.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Move the pinctrl setting for the board LED from the hoggrp node
to a separate node referenced by the LED driver, so that the pin is
free to be used for different purpose when the LED driver is disabled.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

DT maintainers don't like the 'simple-bus' container around the
regulator nodes. So remove it.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Based on i.MX6 Quad Plus with 4GB of RAM.

https://boundarydevices.com/product/nitrogen6max/Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add mdio node and an appropriate PHY configuration to enable use of
the PHY interrupt for link status changes.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Remove the function node around the pinctrl nodes that was obsoleted
by commit 5fcdf6a7 ("pinctrl: imx: Allow parsing DT without
function nodes"), we can save this container node.

Also move the iomux node to the bottom of the file to improve
readability of the file.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The spidev driver doesn't like to be instantiated via a naked 'spidev'
compatible, though it is very convenient to invoke it this way without
a dedicated SPI device for basic functional testing.
Disable the spi node by default to silence the WARN_ON() from the
spidev driver, but leave the configuration intact otherwise.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add an empty line between properties and subnode in the clocks node.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>