- 06 10月, 2016 2 次提交
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由 Jaedon Shin 提交于
Adds SDHCI device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14002/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jaedon Shin 提交于
Adds PWM device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14000/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 13 5月, 2016 1 次提交
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由 Jaedon Shin 提交于
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based platforms. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Dragan Stancevic <dragan.stancevic@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13016/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 09 5月, 2016 1 次提交
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由 Florian Fainelli 提交于
Now that SMP properly works on 7435, do not restrict the number of core, unleash them all. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: john@phrozen.org Cc: cernekee@gmail.com Cc: jon.fraser@broadcom.com Cc: jaedon.shin@gmail.com Cc: dragan.stancevic@gmail.com Cc: jogo@openwrt.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12379/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 22 6月, 2015 1 次提交
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由 Florian Fainelli 提交于
Add a DTS file and Kconfig entry for the BCM97435SVMB evaluation board using bcm7435.dtsi as an example. The current code needs some tweaking to allow us to use the dual-threaded dual BMIPS5200 CPUs, so for now we limit ourselves to allowing just a single CPU to be booted. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@chromium.org Cc: Steven.Hill@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/9972/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 4月, 2015 1 次提交
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由 Kevin Cernekee 提交于
Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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