- 23 9月, 2010 1 次提交
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由 Joerg Roedel 提交于
This patch adds a workaround for an IOMMU BIOS problem to the AMD IOMMU driver. The result of the bug is that the IOMMU does not execute commands anymore when the system comes out of the S3 state resulting in system failure. The bug in the BIOS is that is does not restore certain hardware specific registers correctly. This workaround reads out the contents of these registers at boot time and restores them on resume from S3. The workaround is limited to the specific IOMMU chipset where this problem occurs. Cc: stable@kernel.org Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 01 9月, 2010 1 次提交
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由 Anton Vorontsov 提交于
This is needed for proper PCI-E support on P1021 SoCs. Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 09 8月, 2010 1 次提交
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由 H Hartley Sweeten 提交于
Move the VENDOR/DEVICE ids to pci_ids.h. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 05 8月, 2010 1 次提交
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由 Ilya Yanok 提交于
This patch adds the quirk for PCIE controller found on Freescale MPC8308. The quirk is the same as for other MPC83xx processors. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 03 8月, 2010 2 次提交
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由 Krzysztof Hałasa 提交于
SBE 2T3E3 cards use DECchips 21143 but they need a different driver. Don't even try to use a normal tulip driver with them. Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matt Carlson 提交于
These devices were never released to the public. Reviewed-by: NBenjamin Li <benli@broadcom.com> Reviewed-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 8月, 2010 1 次提交
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由 Tejun Heo 提交于
Add support for JMB364 and 369. Patch-originally-from: Aries Lee <arieslee@jmicron.com> Signed-off-by: NTejun Heo <tj@kernel.org> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 23 7月, 2010 1 次提交
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由 Stefano Stabellini 提交于
Add the xen pci platform device driver that is responsible for initializing the grant table and xenbus in PV on HVM mode. Few changes to xenbus and grant table are necessary to allow the delayed initialization in HVM mode. Grant table needs few additional modifications to work in HVM mode. The Xen PCI platform device raises an irq every time an event has been delivered to us. However these interrupts are only delivered to vcpu 0. The Xen PCI platform interrupt handler calls xen_hvm_evtchn_do_upcall that is a little wrapper around __xen_evtchn_do_upcall, the traditional Xen upcall handler, the very same used with traditional PV guests. When running on HVM the event channel upcall is never called while in progress because it is a normal Linux irq handler (and we cannot switch the irq chip wholesale to the Xen PV ones as we are running QEMU and might have passed in PCI devices), therefore we cannot be sure that evtchn_upcall_pending is 0 when returning. For this reason if evtchn_upcall_pending is set by Xen we need to loop again on the event channels set pending otherwise we might loose some event channel deliveries. Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: NSheng Yang <sheng@linux.intel.com> Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
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- 02 7月, 2010 1 次提交
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由 Tejun Heo 提交于
For yet unknown reason, MCP89 on MBP 7,1 doesn't work w/ ahci under linux but the controller doesn't require explicit mode setting and works fine with ata_generic. Make ahci ignore the controller on MBP 7,1 and let ata_generic take it for now. Reported in bko#15923. https://bugzilla.kernel.org/show_bug.cgi?id=15923 NVIDIA is investigating why ahci mode doesn't work. Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Peer Chen <pchen@nvidia.com> Cc: stable@kernel.org Reported-by: NAnders Østhus <grapz666@gmail.com> Reported-by: NAndreas Graf <andreas_graf@csgraf.de> Reported-by: NBenoit Gschwind <gschwind@gnu-log.net> Reported-by: NDamien Cassou <damien.cassou@gmail.com> Reported-by: tixetsal@juno.com Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 08 6月, 2010 1 次提交
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由 Tejun Heo 提交于
JMB362 is a new variant of jmicron controller which is similar to JMB360 but has two SATA ports instead of one. As there is no PATA port, single function AHCI mode can be used as in JMB360. Add pci quirk for JMB362. Signed-off-by: NTejun Heo <tj@kernel.org> Reported-by: NAries Lee <arieslee@jmicron.com> Cc: stable@kernel.org Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 19 5月, 2010 2 次提交
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由 Vernon Mauery 提交于
This adds new PCI IDs for the Westmere's memory controller devices and modifies the i7core_edac driver to be able to probe both Nehalem and Westmere processors. Signed-off-by: NVernon Mauery <vernux@us.ibm.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
As reported by Vernon Mauery <vernux@us.ibm.com>, X5670 (Westmere-EP) uses a different register for one of the uncore PCI devices. Add support for it. Those are the PCI ID's on this new chipset: fe:00.0 0600: 8086:2c70 (rev 02) fe:00.1 0600: 8086:2d81 (rev 02) fe:02.0 0600: 8086:2d90 (rev 02) fe:02.1 0600: 8086:2d91 (rev 02) fe:02.2 0600: 8086:2d92 (rev 02) fe:02.3 0600: 8086:2d93 (rev 02) fe:02.4 0600: 8086:2d94 (rev 02) fe:02.5 0600: 8086:2d95 (rev 02) fe:03.0 0600: 8086:2d98 (rev 02) fe:03.1 0600: 8086:2d99 (rev 02) fe:03.2 0600: 8086:2d9a (rev 02) fe:03.4 0600: 8086:2d9c (rev 02) fe:04.0 0600: 8086:2da0 (rev 02) fe:04.1 0600: 8086:2da1 (rev 02) fe:04.2 0600: 8086:2da2 (rev 02) fe:04.3 0600: 8086:2da3 (rev 02) fe:05.0 0600: 8086:2da8 (rev 02) fe:05.1 0600: 8086:2da9 (rev 02) fe:05.2 0600: 8086:2daa (rev 02) fe:05.3 0600: 8086:2dab (rev 02) fe:06.0 0600: 8086:2db0 (rev 02) fe:06.1 0600: 8086:2db1 (rev 02) fe:06.2 0600: 8086:2db2 (rev 02) fe:06.3 0600: 8086:2db3 (rev 02) (as usual, the same PCI devices repeat at ff: bus) The PCI device 8086:2c70 is shown as: fe:00.0 Host bridge: Intel Corporation QuickPath Architecture Generic Non-core Registers (rev 02) So, for this device to be recognized, it is only a matter of adding this new PCI ID to the driver. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 12 5月, 2010 1 次提交
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由 Seth Heasley 提交于
This patch adds additional LPC Controller DeviceIDs for the Intel Cougar Point PCH. The DeviceIDs are defined and referenced as a range of values, the same way Ibex Peak was implemented. Signed-off-by: NSeth Heasley <seth.heasley@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 10 5月, 2010 7 次提交
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由 Mauro Carvalho Chehab 提交于
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
Xeon55xx fails to probe with this error message: EDAC DEBUG: in drivers/edac/i7core_edac.c, line at 1660: MC: drivers/edac/i7core_edac.c: i7core_init() EDAC i7core: Device not found: dev 00:00.0 PCI ID 8086:2c41 i7core_edac: probe of 0000:00:14.0 failed with error -22 This is due to the fact that, on Xeon35xx (and i7core), device 00.0 has PCI ID 8086:2c40. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
This code changes the detection procedure of i7core_edac. Instead of directly probing for MC registers, it probes for another register found on Nehalem. If found, it tries to pick the first MC PCI BUS. This should work fine with Xeon 35xx, but, on Xeon 55xx, this is at bus 254 and 255 that are not properly detected by the non-legacy PCI methods. The new detection code scans specifically at buses 254 and 255 for the Xeon 55xx devices. This code has not tested yet. After working, a change at the code will be needed, since the i7core is not yet ready for working with 2 sets of MC. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
The public Intel Xeon 5500 volume 2 datasheet describes, on page 53, session 2.6.7 a register that can lock/unlock Memory Controller the configuration register, called MC_CFG_CONTROL. Adds support for it in the hope that software error injection would work. With my tests with Xeon 35xx, there's still something missing. With a program that does sequencial bit writes at dev 0.0, sometimes, it produces error injection, after unblocking the MC_CFG_CONTROL (and, sometimes, it just locks my testing machine). I'll try later to discover by trial and error what's the register that solves this issue on Xeon 35xx. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Mauro Carvalho Chehab 提交于
This driver is meant to support i7 core/i7core extreme desktop processors and Xeon 35xx/55xx series with integrated memory controller. It is likely that it can be expanded in the future to work with other processor series based at the same Memory Controller design. For now, it has just a few MCH status reads. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 03 3月, 2010 2 次提交
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由 Kiros Yeh 提交于
Add different model (with a different PCI ID) to support Korenix JetCard. Signed-off-by: NKiros Yeh <kiros@korenix.com> Acked-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Ira W. Snyder 提交于
This patch is heavily based on an earlier patch found on the linux-serial mailing list [1], written by Darius Augulis. The previous incarnation of this patch only supported a 2x serial port card. I have added support for my SYBA 6x serial port card, and tested on x86. [1]: http://marc.info/?l=linux-serial&m=124975806304760Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu> Cc: Darius Augulis <augulis.darius@gmail.com> Cc: Greg KH <greg@kroah.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 25 2月, 2010 1 次提交
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由 Stefan Richter 提交于
This code was no longer used since 2.6.33, "firewire: ohci: always use packet-per-buffer mode for isochronous reception" commit 090699c0. If anybody needs this code in the future for special purposes, it can be brought back in. But it must not be re-enabled by default; drivers (kernelspace or userspace drivers) should only get this mode if they explicitly request it. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 23 2月, 2010 1 次提交
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由 Seth Heasley 提交于
This patch adds the Intel Cougar Point (PCH) LPC and SMBus Controller DeviceIDs. Signed-off-by: NSeth Heasley <seth.heasley@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 05 12月, 2009 1 次提交
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由 jack wang 提交于
This driver supports PMC-Sierra PCIe SAS/SATA 8x6G SPC 8001 chip based host adapters. Signed-off-by: NJack Wang <jack_wang@usish.com> Signed-off-by: NLindar Liu <lindar_liu@usish.com> Signed-off-by: NTom Peng <tom_peng@usish.com> Signed-off-by: NKevin Ao <aoqingyun@usish.com> Signed-off-by: NJames Bottomley <James.Bottomley@suse.de>
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- 04 12月, 2009 1 次提交
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由 Alan Cox 提交于
We were never able to get docs for this out of Toshiba for years. Dave Barnes produced a NetBSD driver however and from that we can fill in the needed tables. As we correct the PCI identifiers a bit also update the old ide generic driver at the same time so it stays compiling. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 21 11月, 2009 1 次提交
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 12 11月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
This seems to be a different model (with a different PCI ID) than the "Quatro" card that is also in the list. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 11月, 2009 1 次提交
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由 Crane Cai 提交于
Change SB900 to its formal code name Hudson-2. Signed-off-by: NCrane Cai <crane.cai@amd.com> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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- 29 10月, 2009 2 次提交
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由 Benjamin Herrenschmidt 提交于
The IBM Saturn serial card has only one port. Without that fixup, the kernel thinks it has two, which confuses userland setup and admin tools as well. [akpm@linux-foundation.org: fix pci-ids.h layout] Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NAlan Cox <alan@linux.intel.com> Cc: Michael Reed <mreed10@us.ibm.com> Cc: <stable@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Krauth.Julien 提交于
Add support for ADDI-DATA GmbH PCI-Express communication cards: APCIe-7300 APCIe-7420 APCIe-7500 APCIe-7800 Warning: 8250_pci.c depends on pci_ids.h. 8250_pci.c Signed-off-by: NKrauth Julien <Krauth.Julien@addi-data.com> Acked-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 10月, 2009 1 次提交
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由 Wolfram Sang 提交于
Out of 10 PCI_IDs found in the PCMCIA subsystem, only two were not defined in pci_ids.h. Move them and drop the duplicates. Successfully build-tested. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net>
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- 16 10月, 2009 1 次提交
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由 Shane Huang 提交于
This patch renames the code name SB900 into Hudson-2 Signed-off-by: NShane Huang <shane.huang@amd.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 08 10月, 2009 1 次提交
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由 Gabe Black 提交于
This quirk will disable fast back to back transfer on the secondary bus segment of the TI Bridge. Signed-off-by: NGabe Black <gabe.black@ni.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 19 9月, 2009 1 次提交
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由 Crane Cai 提交于
Add new SMBus device ID for AMD SB900. Signed-off-by: NCrane Cai <crane.cai@amd.com> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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- 18 9月, 2009 1 次提交
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由 John(Jung-Ik) Lee 提交于
This is a new pata driver for ARTOP 867X 64bit 4-channel UDMA133 ATA ctrls. Based on the Atp867 data sheet rev 1.2, Acard, and in part on early ide codes from Eric Uhrhane <ericu@google.com>. Signed-off-by: NJohn(Jung-Ik) Lee <jilee@google.com> Reviewed-by: NGrant Grundler <grundler@google.com> Reviewed-by: NGwendal Gringo <gwendal@google.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 11 9月, 2009 2 次提交
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由 Otavio Salvador 提交于
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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由 Shane Huang 提交于
Add AMD SB900 SATA/IDE controller device IDs. Signed-off-by: NShane Huang <shane.huang@amd.com> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 10 9月, 2009 1 次提交
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由 Dave Jones 提交于
IDs should generally only be added to pci_ids.h when they're shared across several files in the tree. IDs that are just used by a single driver should be defined in the driver instead. Perhaps documenting this is a good idea to prevent things being moved there, as it still seems to be happening judging from the git log. (based on discussion w/gregkh and others). Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Signed-off-by: NDave Jones <davej@redhat.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 09 9月, 2009 1 次提交
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由 Tom Picard 提交于
Jasper Forest introduces raid offload support via ioat3.2 support. When raid offload is enabled two (out of 8 channels) will report raid5/raid6 offload capabilities. The remaining channels will only report ioat3.0 capabilities (memcpy). Signed-off-by: NTom Picard <tom.s.picard@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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