1. 14 5月, 2013 3 次提交
  2. 10 5月, 2013 2 次提交
  3. 08 5月, 2013 1 次提交
  4. 07 5月, 2013 1 次提交
  5. 06 5月, 2013 5 次提交
  6. 02 5月, 2013 6 次提交
  7. 30 4月, 2013 11 次提交
  8. 27 4月, 2013 11 次提交
    • P
      KVM: PPC: Book3S: Facilities to save/restore XICS presentation ctrler state · 8b78645c
      Paul Mackerras 提交于
      This adds the ability for userspace to save and restore the state
      of the XICS interrupt presentation controllers (ICPs) via the
      KVM_GET/SET_ONE_REG interface.  Since there is one ICP per vcpu, we
      simply define a new 64-bit register in the ONE_REG space for the ICP
      state.  The state includes the CPU priority setting, the pending IPI
      priority, and the priority and source number of any pending external
      interrupt.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8b78645c
    • P
      KVM: PPC: Book3S: Add support for ibm,int-on/off RTAS calls · d19bd862
      Paul Mackerras 提交于
      This adds support for the ibm,int-on and ibm,int-off RTAS calls to the
      in-kernel XICS emulation and corrects the handling of the saved
      priority by the ibm,set-xive RTAS call.  With this, ibm,int-off sets
      the specified interrupt's priority in its saved_priority field and
      sets the priority to 0xff (the least favoured value).  ibm,int-on
      restores the saved_priority to the priority field, and ibm,set-xive
      sets both the priority and the saved_priority to the specified
      priority value.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d19bd862
    • P
      KVM: PPC: Book3S HV: Improve real-mode handling of external interrupts · 4619ac88
      Paul Mackerras 提交于
      This streamlines our handling of external interrupts that come in
      while we're in the guest.  First, when waking up a hardware thread
      that was napping, we split off the "napping due to H_CEDE" case
      earlier, and use the code that handles an external interrupt (0x500)
      in the guest to handle that too.  Secondly, the code that handles
      those external interrupts now checks if any other thread is exiting
      to the host before bouncing an external interrupt to the guest, and
      also checks that there is actually an external interrupt pending for
      the guest before setting the LPCR MER bit (mediated external request).
      
      This also makes sure that we clear the "ceded" flag when we handle a
      wakeup from cede in real mode, and fixes a potential infinite loop
      in kvmppc_run_vcpu() which can occur if we ever end up with the ceded
      flag set but MSR[EE] off.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4619ac88
    • B
      KVM: PPC: Book3S HV: Speed up wakeups of CPUs on HV KVM · 54695c30
      Benjamin Herrenschmidt 提交于
      Currently, we wake up a CPU by sending a host IPI with
      smp_send_reschedule() to thread 0 of that core, which will take all
      threads out of the guest, and cause them to re-evaluate their
      interrupt status on the way back in.
      
      This adds a mechanism to differentiate real host IPIs from IPIs sent
      by KVM for guest threads to poke each other, in order to target the
      guest threads precisely when possible and avoid that global switch of
      the core to host state.
      
      We then use this new facility in the in-kernel XICS code.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      54695c30
    • B
      KVM: PPC: Book3S: Add kernel emulation for the XICS interrupt controller · bc5ad3f3
      Benjamin Herrenschmidt 提交于
      This adds in-kernel emulation of the XICS (eXternal Interrupt
      Controller Specification) interrupt controller specified by PAPR, for
      both HV and PR KVM guests.
      
      The XICS emulation supports up to 1048560 interrupt sources.
      Interrupt source numbers below 16 are reserved; 0 is used to mean no
      interrupt and 2 is used for IPIs.  Internally these are represented in
      blocks of 1024, called ICS (interrupt controller source) entities, but
      that is not visible to userspace.
      
      Each vcpu gets one ICP (interrupt controller presentation) entity,
      used to store the per-vcpu state such as vcpu priority, pending
      interrupt state, IPI request, etc.
      
      This does not include any API or any way to connect vcpus to their
      ICP state; that will be added in later patches.
      
      This is based on an initial implementation by Michael Ellerman
      <michael@ellerman.id.au> reworked by Benjamin Herrenschmidt and
      Paul Mackerras.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      [agraf: fix typo, add dependency on !KVM_MPIC]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      bc5ad3f3
    • M
      KVM: PPC: Book3S: Add infrastructure to implement kernel-side RTAS calls · 8e591cb7
      Michael Ellerman 提交于
      For pseries machine emulation, in order to move the interrupt
      controller code to the kernel, we need to intercept some RTAS
      calls in the kernel itself.  This adds an infrastructure to allow
      in-kernel handlers to be registered for RTAS services by name.
      A new ioctl, KVM_PPC_RTAS_DEFINE_TOKEN, then allows userspace to
      associate token values with those service names.  Then, when the
      guest requests an RTAS service with one of those token values, it
      will be handled by the relevant in-kernel handler rather than being
      passed up to userspace as at present.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      [agraf: fix warning]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8e591cb7
    • A
      KVM: PPC: MPIC: Add support for KVM_IRQ_LINE · 5efdb4be
      Alexander Graf 提交于
      Now that all pieces are in place for reusing generic irq infrastructure,
      we can copy x86's implementation of KVM_IRQ_LINE irq injection and simply
      reuse it for PPC, as it will work there just as well.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5efdb4be
    • A
      KVM: PPC: Support irq routing and irqfd for in-kernel MPIC · de9ba2f3
      Alexander Graf 提交于
      Now that all the irq routing and irqfd pieces are generic, we can expose
      real irqchip support to all of KVM's internal helpers.
      
      This allows us to use irqfd with the in-kernel MPIC.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      de9ba2f3
    • S
      kvm/ppc/mpic: add KVM_CAP_IRQ_MPIC · eb1e4f43
      Scott Wood 提交于
      Enabling this capability connects the vcpu to the designated in-kernel
      MPIC.  Using explicit connections between vcpus and irqchips allows
      for flexibility, but the main benefit at the moment is that it
      simplifies the code -- KVM doesn't need vm-global state to remember
      which MPIC object is associated with this vm, and it doesn't need to
      care about ordering between irqchip creation and vcpu creation.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      [agraf: add stub functions for kvmppc_mpic_{dis,}connect_vcpu]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      eb1e4f43
    • S
      kvm/ppc/mpic: in-kernel MPIC emulation · 5df554ad
      Scott Wood 提交于
      Hook the MPIC code up to the KVM interfaces, add locking, etc.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      [agraf: add stub function for kvmppc_mpic_set_epr, non-booke, 64bit]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5df554ad
    • P
      KVM: PPC: Book3S HV: Report VPA and DTL modifications in dirty map · c35635ef
      Paul Mackerras 提交于
      At present, the KVM_GET_DIRTY_LOG ioctl doesn't report modifications
      done by the host to the virtual processor areas (VPAs) and dispatch
      trace logs (DTLs) registered by the guest.  This is because those
      modifications are done either in real mode or in the host kernel
      context, and in neither case does the access go through the guest's
      HPT, and thus no change (C) bit gets set in the guest's HPT.
      
      However, the changes done by the host do need to be tracked so that
      the modified pages get transferred when doing live migration.  In
      order to track these modifications, this adds a dirty flag to the
      struct representing the VPA/DTL areas, and arranges to set the flag
      when the VPA/DTL gets modified by the host.  Then, when we are
      collecting the dirty log, we also check the dirty flags for the
      VPA and DTL for each vcpu and set the relevant bit in the dirty log
      if necessary.  Doing this also means we now need to keep track of
      the guest physical address of the VPA/DTL areas.
      
      So as not to lose track of modifications to a VPA/DTL area when it gets
      unregistered, or when a new area gets registered in its place, we need
      to transfer the dirty state to the rmap chain.  This adds code to
      kvmppc_unpin_guest_page() to do that if the area was dirty.  To simplify
      that code, we now require that all VPA, DTL and SLB shadow buffer areas
      fit within a single host page.  Guests already comply with this
      requirement because pHyp requires that these areas not cross a 4k
      boundary.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c35635ef