1. 14 2月, 2013 1 次提交
  2. 31 1月, 2013 1 次提交
    • D
      drm/i915: dynamic Haswell display power well support · d6dd9eb1
      Daniel Vetter 提交于
      We can disable (almost) all the display hw if we only use pipe A, with
      the integrated edp transcoder on port A. Because we don't set the cpu
      transcoder that early (yet), we need to help us with a trick to simply
      check for any edp encoders.
      
      v2: Paulo Zanoni pointed out that we also need to configure the eDP
      cpu transcoder correctly.
      
      v3: Made by Paulo Zanoni
        - Rebase patch to be on top of "fix intel_init_power_wells" patch
        - Fix typos
        - Fix a small bug by adding a "connectors_active" check
        - Restore the initial code that unconditionally enables the power
          well when taking over from the BIOS
      
      v4: Made by Paulo Zanoni
        - One more typo spotted by Jani Nikula
      
      v5: Made by Paulo Zanoni
        - Rebase
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      d6dd9eb1
  3. 23 1月, 2013 1 次提交
  4. 10 12月, 2012 1 次提交
  5. 08 12月, 2012 1 次提交
    • P
      drm/i915: fix hsw_fdi_link_train "retry" code · 248138b5
      Paulo Zanoni 提交于
      We were previously doing exactly what the "mode set sequence for CRT"
      document mandates, but whenever we failed to train the link in the
      first tentative, all the other subsequent retries always failed. In
      one of my monitors that has 47 modes, I was usually getting around 3
      failures when running "testdisplay -a".
      
      After this patch, even if we fail in the first tentative, we can
      succeed in the next ones. So now when running "testdisplay -a" I see
      around 3 times the message "FDI link training done on step 1" and no
      failures.
      
      Notice that now the "retry" code looks a lot like the DP retry code.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      248138b5
  6. 04 12月, 2012 1 次提交
    • D
      drm/i915: fixup sparse warnings · 1a240d4d
      Daniel Vetter 提交于
      - __iomem where there is none (I love how we mix these things up).
      - Use gfp_t instead of an other plain type.
      - Unconfuse one place about enum pipe vs enum transcoder - for the pch
        transcoder we actually use the pipe enum. Fixup the other cases
        where we assign the pipe to the cpu transcoder with explicit casts.
      - Declare the mch_lock properly in a header.
      
      There is still a decent mess in intel_bios.c about __iomem, but heck,
      this is x86 and we're allowed to do that.
      
      Makes-sparse-happy: Chris Wilson <chris@chris-wilson.co.uk>
      [danvet: Use a space after the cast consistently and fix up the
      newly-added cast in i915_irq.c to properly use __iomem.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1a240d4d
  7. 29 11月, 2012 3 次提交
  8. 22 11月, 2012 2 次提交
  9. 12 11月, 2012 6 次提交
    • P
      drm/i915: fix Haswell FDI link disable path · 1ad960f2
      Paulo Zanoni 提交于
      This covers the "Disable FDI" section from the CRT mode set sequence.
      This disables the FDI receiver and also the FDI pll.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1ad960f2
    • P
      drm/i915: fix Haswell FDI link training code · 04945641
      Paulo Zanoni 提交于
      This commit makes hsw_fdi_link_train responsible for implementing
      everything described in the "Enable and train FDI" section from the
      Hawell CRT mode set sequence documentation. We completely rewrite
      hsw_fdi_link_train to match the documentation and we also call it in
      the right place.
      
      This patch was initially sent as a series of tiny patches fixing every
      little problem of the function, but since there were too many patches
      fixing the same function it got a little difficult to get the "big
      picture" of how the function would be in the end, so here we amended
      all the patches into a single big patch fixing the whole function.
      
      Problems we fixed:
      
        1 - Train Haswell FDI at the right time.
      
          We need to train the FDI before enabling the pipes and planes, so
          we're moving the call from lpt_pch_enable to haswell_crtc_enable
          directly.
      
          We are also removing ironlake_fdi_pll_enable since the PLL
          enablement on Haswell is completely different and is also done
          during the link training steps.
      
        2 - Use the right FDI_RX_CTL register on Haswell
      
          There is only one PCH transcoder, so it's always _FDI_RXA_CTL.
          Using "pipe" here is wrong.
      
        3 - Don't rely on DDI_BUF_CTL previous values
      
          Just set the bits we want, everything else is zero. Also
          POSTING_READ the register before sleeping.
      
        4 - Program the FDI RX TUSIZE register on hsw_fdi_link_train
      
          According to the mode set sequence documentation, this is the
          right place. According to the FDI_RX_TUSIZE register description,
          this is the value we should set.
      
          Also remove the code that sets this register from the old
          location: lpt_pch_enable.
      
        5 - Properly program FDI_RX_MISC pwrdn lane values on HSW
      
        6 - Wait only 35us for the FDI link training
      
          First we wait 30us for the FDI receiver lane calibration, then we
          wait 5us for the FDI auto training time.
      
        7 - Remove an useless indentation level on hsw_fdi_link_train
      
          We already "break" when the link training succeeds.
      
        8 - Disable FDI_RX_ENABLE, not FDI_RX_PLL_ENABLE
      
          When we fail the training.
      
        9 - Change Haswell FDI link training error messages
      
          We shouldn't call DRM_ERROR when still looping through voltage
          levels since this is expected and not really a failure. So in this
          commit we adjust the error path to only DRM_ERROR when we really
          fail after trying everything.
      
          While at it, replace DRM_DEBUG_DRIVER with DRM_DEBUG_KMS since
          it's what we use everywhere.
      
        10 - Try each voltage twice at hsw_fdi_link_train
      
          Now with Daniel Vetter's suggestion to use "/2" instead of ">>1".
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      [danvet: Applied tiny bikesheds:
      - mention in comment that we test each voltage/emphasis level twice
      - realing arguments of the only untouched reg write, it spilled over
        the 80 char limit ...]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      04945641
    • P
      drm/i915: set the correct number of FDI lanes on Haswell · 349d7e5d
      Paulo Zanoni 提交于
      We had 2 places using X2 and one place using X1.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      349d7e5d
    • P
      drm/i915: create the DDI encoder · 00c09d70
      Paulo Zanoni 提交于
      Now intel_ddi_init is just like intel_hdmi_init and intel_dp_init: it
      inits the encoder and then calls the proper init_connector functions.
      Notice that for non-eDP ports we call both HDMI and DP connector init,
      so we have 2 connectors attached to each DDI encoder.
      
      After this change, intel_hdmi_init and intel_dp_init are only called
      by Ivy Bridge and earlier, while hardware containing DDI outputs
      should call intel_ddi_init.
      
      Also added/removed quite a few "static" keywords due to the fact that
      some function pointers were moved from intel_dp.c and intel_hdmi.c to
      intel_ddi.c.
      
      DP finally works on Haswell now! \o/
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      00c09d70
    • P
      drm/i915: add intel_ddi_connector_get_hw_state · bcbc889b
      Paulo Zanoni 提交于
      We need this since now on DDI we will have 2 connectors on each
      encoder.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bcbc889b
    • P
      drm/i915: add port field to intel_digital_port · 174edf1f
      Paulo Zanoni 提交于
      Both "intel_dp" and "intel_hdmi" structs had a "port" field, which
      always had the same value. It makes more sense to move this to
      intel_digital_port, so we can know the port independently of the
      connector type.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      174edf1f
  10. 26 10月, 2012 8 次提交
  11. 19 10月, 2012 6 次提交
  12. 18 10月, 2012 3 次提交
  13. 12 10月, 2012 1 次提交
  14. 11 10月, 2012 1 次提交
  15. 10 10月, 2012 4 次提交