Currently, overo-related include files are organized as follow:

                     omap3-overo.dtsi
                             |
                             |
omap34xx.dtsi   omap3-overo-tobi-common.dtsi   omap36xx.dtsi
      |              |                 |             |
      ---------------                  ---------------
              |                                |
    omap3-overo-tobi.dts          omap3-overo-storm-tobi.dts

This is unpractical when one has to deal with SoC-specific pinmux
belonging to the omap3_pmx_core2 (defined in omap34xx/omap36xx),
for pins related to the processor board. With the current
hierarchy, such pinmux has to be defined in the expansion board's
.dts, which is not logical.

This patches reorganizes the files to add (yet another) abstraction
layer between the processor and the expansion boards.

omap34xx.dtsi       omap3-overo-base.dtsi      omap36xx.dtsi
      |              |                 |             |
      ---------------                  ---------------
              |                                |
      omap3-overo.dtsi               omap3-overo-storm.dtsi
              |                                |
      --------                                  ------
      |         omap3-overo-tobi-common.dtsi         |
      |              |                 |             |
      ---------------                  ---------------
              |                                |
    omap3-overo-tobi.dts          omap3-overo-storm-tobi.dts
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The testcase data is usable by any platform. This patch moves it into
the drivers/of directory so it can be included by any architecture.

Using the test cases requires manually adding #include <testcases.dtsi>
to the end of the boards .dtsi file and enabling CONFIG_OF_SELFTEST. Not
pretty though. A useful project would be to make the testcase code
easier to execute.
Signed-off-by: NGrant Likely <grant.likely@linaro.org>

Fix tegra_init_cache() to check whether the system has a PL310 cache
before touching the PL310 registers. This prevents access to non-existent
registers on Tegra114 and later.

Note for stable kernels:
In <= v3.12, the file to patch is arch/arm/mach-tegra/common.c.

Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The number of the head specifies the index of the display controller
unit and is required to properly configure outputs so that they receive
video data from the correct source.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

When building a kernel image with only CONFIG_CPU_IDLE but no CONFIG_PM,
we will get the following link error.

  LD      init/built-in.o
arch/arm/mach-imx/built-in.o: In function `imx6q_enter_wait':
platform-spi_imx.c:(.text+0x25c0): undefined reference to `imx6q_set_lpm'
platform-spi_imx.c:(.text+0x25d4): undefined reference to `imx6q_set_lpm'
arch/arm/mach-imx/built-in.o: In function `imx6q_cpuidle_init':
platform-spi_imx.c:(.init.text+0x75d4): undefined reference to `imx6q_set_chicken_bit'
make[1]: *** [vmlinux] Error 1

Since pm-imx6q.c has been a collection of library functions that access
CCM low-power registers used by not only suspend but also cpuidle and
other drivers, let's build pm-imx6q.c independently of CONFIG_PM to fix
above error.
Reported-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: stable@vger.kernel.org
Acked-by: NChristian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This alias entry was evidently cut/paste from a different board, and
not correctly updated to match Cardhu. Fix this.

Fixes: 553c0a20 ("ARM: tegra: set up /aliases entries for RTCs")
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The corresponding driver didn't make it into v3.14, so we need to remove
the node.  Dove systems fail to boot with the node present and no
driver.

This node will be re-added when the driver makes it to mainline.
Reported-by: NJean-Francois Moine <moinejf@free.fr>
Tested-by: NJean-Francois Moine <moinejf@free.fr>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Add DSB after icache flush to complete the cache maintenance operation.
Signed-off-by: NVinayak Kale <vkale@apm.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This reverts commit 01ab1167, it is
incorrect, a future patch will fix this up properly.

Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Unfortunatly the device tree for older OMAP35xx Overo cannot be used
with newer OMAP36xx and vice-versa. To address this issue, move most of
the Tobi DTS to a common include file, and create model-specific Tobi
DTS.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Tested-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Gumstix is the correct vendor for all Overo related products.
Reported-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Tobi expansion board can be used with both OMAP35xx-based Overo,
and OMAP36xx-based Overo. Currently the boot is broken with newer
OMAP36xx-based Overo (Storm and alike). Fix include file and
compatible string to be able to boot newer models.

This will break older models. This will be addressed later.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Tested-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 97411608 ("ARM: OMAP2+: Remove legacy support for zoom
platforms") removed the Kconfig symbols MACH_OMAP_ZOOM2 and
MACH_OMAP_ZOOM3. Remove the last usage of the related macros too.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The last caller of machine_is_nokia_n800() was removed in commit
5a87cde4 ("ARM: OMAP2+: Remove legacy booting support for n8x0").
That means that the Kconfig symbol MACH_NOKIA_N800 is now unused. It can
safely be removed.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Acked-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add missing compatible property to avoid problems in the future.
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

N9/N950 does not boot anymore with 3.14-rc1, because SoC compatible
property is missing. Fix that.
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add platform data for tahvo-usb. This is the last missing piece to get
Tahvo USB working with 3.14.
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fixes: commit 75d3625e
       ARM: OMAP2+: gpmc: add DT bindings for OneNAND

OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for ONENAND driver to probe later. However this does
not happen if generic MTD_ONENAND framework is built as module (CONFIG_MTD_ONENAND=m).

Therefore, when MTD/ONENAND and MTD/ONENAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
ONENAND flash to remain un-detected.

This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_ONENAND=y || CONFIG_MTD_ONENAND=m

CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: NPekon Gupta <pekon@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fixes: commit bc6b1e7b
       ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND

OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for NAND driver to probe later. However this does
not happen if generic MTD_NAND framework is built as module (CONFIG_MTD_NAND=m).

Therefore, when MTD/NAND and MTD/NAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
NAND flash to remain un-detected.

This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_NAND=y || CONFIG_MTD_NAND=m

CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: NPekon Gupta <pekon@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Does not have an aux supply, and must be non-removable.

Otherwise it is removed during suspend and filesystem gets confused.
Signed-off-by: NNeilBrown <neilb@suse.de>
Signed-off-by: NTony Lindgren <tony@atomide.com>

It should be ACTIVE_HIGH.
Signed-off-by: NNeilBrown <neilb@suse.de>
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP5, DRA7, AM43xx all have OPPs. So select the same to allow SoC
only configuration boot to work with OPP.
Reported-by: NNikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add pinctrl section and cd-gpio to mmc1. Without these the SD card is not
working on EVM-SK board.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The clock for audio is sourced from virt_24000000_ck, so the correct
frequency is 24000000.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

BMP085 EOC (End Of Conversion) irq line is connected to
gpio113 on gta04. Set irq properties to have driver using irq
instead polling for EOC.
Signed-off-by: NMarek Belisko <marek@goldelico.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 70b41abc
"ARM: ux500: move MSP pin control to the device tree"
accidentally activated MSP2, giving rise to a boot scroll
scream as the kernel attempts to probe a driver for it and
fails to obtain DMA channel 14.

Fix this up by marking the node disabled again.
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

GFP_ATOMIC is not a single gfp flag, but a macro which expands to the other
flags and LACK of __GFP_WAIT flag. To check if caller wanted to perform an
atomic allocation, the code must test __GFP_WAIT flag presence. This patch
fixes the issue introduced in v3.6-rc5
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
CC: stable@vger.kernel.org

Recent changes to the pwm-backlight driver have made the power supply
mandatory. There is code in the regulator core to deal with situations
where no regulator is specified and provide a dummy, but that works on
DT-based boards only.

The situation can be remedied by adding a dummy regulator during board
initialization.
Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

Reserve space from 0x0 - __pa(swapper_pg_dir),
if kernel is loaded from 0, which is not DMAable.
It is causing problem with MMC driver and others
which want to add dma buffers to this space.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

Select CONFIG_SOC_DRA7XX so that we can boot dra7-evm.
DRA7 family are A15 based processors that supports LPAE and an
evolutionary update to the OMAP5 generation of processors.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

Since commit 9e8147bb
"ARM: imx6q: move low-power code out of clock driver"
the kernel fails to boot on i.MX6Q/D if preemption is
enabled (CONFIG_PREEMPT=y). The kernel just hangs
before the console comes up.

The above commit moved the initalization of the low-power
mode setting (enabling clocked WAIT states), which was
introduced in commit 83ae2098
"ARM: imx: correct low-power mode setting", from
imx6q_clks_init to imx6q_pm_init. Now it is called
much later, after all cores are enabled.

This patch moves the low-power mode initialization back
to imx6q_clks_init again (and to imx6sl_clks_init).
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

Due to commit 88f718e3
"ARM: pxa: delete the custom GPIO header" some drivers fail
compilation, for example like this:

In file included from sound/soc/pxa/spitz.c:28:0:
sound/soc/pxa/spitz.c: In function ‘spitz_ext_control’:
arch/arm/mach-pxa/include/mach/spitz.h:111:30: error:
‘PXA_NR_BUILTIN_GPIO’ undeclared (first use in this function)
 #define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
(etc.)

This is caused by implicit inclusion of <mach/irqs.h> from
various board-specific headers under <mach/*> in the PXA
platform. So we take a sweep over these, and for every such
header that uses PXA_NR_BUILTIN_GPIO or PXA_GPIO_TO_IRQ()
we explicitly #include "irqs.h" so that we satisfy the
dependency in the board include file alone.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org # v3.13+
Signed-off-by: NKevin Hilman <khilman@linaro.org>

This board fails compilation like this:
arch/arm/mach-pxa/am300epd.c: In function ‘am300_cleanup’:
arch/arm/mach-pxa/am300epd.c:179:2: error: implicit declaration
of function ‘PXA_GPIO_TO_IRQ’ [-Werror=implicit-function-declaration]
  free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);

This was caused by commit 88f718e3
"ARM: pxa: delete the custom GPIO header"

This is because it was previously getting the macro PXA_GPIO_TO_IRQ
implicitly from <linux/gpio.h> which in turn implicitly included
<mach/gpio.h> which in turn included <mach/irqs.h>.

Add the missing include so that the board compiles again.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

When unlocking a spinlock, we require the following, strictly ordered
sequence of events:

	<barrier>	/* dmb */
	<unlock>
	<barrier>	/* dsb */
	<sev>

Whilst the code does indeed reflect this in terms of the architecture,
the final <barrier> + <sev> have been contracted into a single inline
asm without a "memory" clobber, therefore the compiler is at liberty to
reorder the unlock to the end of the above sequence. In such a case,
a waiting CPU may be woken up before the lock has been unlocked, leading
to extremely poor performance.

This patch reworks the dsb_sev() function to make use of the dsb()
macro and ensure ordering against the unlock.

Cc: <stable@vger.kernel.org>
Reported-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

During __v{6,7}_setup, we invalidate the TLBs since we are about to
enable the MMU on return to head.S. Unfortunately, without a subsequent
dsb instruction, the invalidation is not guaranteed to have completed by
the time we write to the sctlr, potentially exposing us to junk/stale
translations cached in the TLB.

This patch reworks the init functions so that the dsb used to ensure
completion of cache/predictor maintenance is also used to ensure
completion of the TLB invalidation.

Cc: <stable@vger.kernel.org>
Reported-by: NAlbin Tonnerre <Albin.Tonnerre@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit ad6492b8 added much needed memblock_virt_alloc_low() and further
commit 07bacb38 {memblock, bootmem: restore goal for alloc_low} fixed
the issue with low memory limit thanks to Yinghai. But even after all
these fixes, there is still one case where the limit check done with
ARCH_LOW_ADDRESS_LIMIT for low memory fails. Russell pointed out the
issue with 32 bit LPAE machines in below thread.
	https://lkml.org/lkml/2014/1/28/364

Since on some LPAE machines where memory start address is beyond 4GB,
the low memory marker in memblock will be set to default
ARCH_LOW_ADDRESS_LIMIT which is wrong. We can fix this by letting
architectures set the ARCH_LOW_ADDRESS_LIMIT using another export
similar to memblock_set_current_limit() but am not sure whether
its worth the trouble. Tell me if you think otherwise.

Rather am just trying to fix that one broken case using
memblock_virt_alloc() in setup code since the memblock.current_limit
is updated appropriately makes it work on all ARM 32 bit machines.

Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Strashko, Grygorii <grygorii.strashko@ti.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The stage-2 memory attributes are distinct from the Hyp memory
attributes and the Stage-1 memory attributes.  We were using the stage-1
memory attributes for stage-2 mappings causing device mappings to be
mapped as normal memory.  Add the S2 equivalent defines for memory
attributes and fix the comments explaining the defines while at it.

Add a prot_pte_s2 field to the mem_type struct and fill out the field
for device mappings accordingly.

Cc: <stable@vger.kernel.org>	[3.9+]
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The spdif pinmux configuration must be connected to the spdif device to
take effect, not the spdif-transmitter.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Switch the device tree to the new compatibles introduced in the SID drivers
to have a common pattern accross all Allwinner SoCs.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add DT file for new SAMA5D3 Xplained board.
This board is based on Atmel's SAMA5D36 Cortex-A5 SoC.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>