1. 26 5月, 2018 2 次提交
    • B
      bnxt_en: Report PCIe link properties with pcie_print_link_status() · af125b75
      Bjorn Helgaas 提交于
      Previously the driver used pcie_get_minimum_link() to warn when the NIC
      is in a slot that can't supply as much bandwidth as the NIC could use.
      
      pcie_get_minimum_link() can be misleading because it finds the slowest link
      and the narrowest link (which may be different links) without considering
      the total bandwidth of each link.  For a path with a 16 GT/s x1 link and a
      2.5 GT/s x16 link, it returns 2.5 GT/s x1, which corresponds to 250 MB/s of
      bandwidth, not the true available bandwidth of about 1969 MB/s for a
      16 GT/s x1 link.
      
      Use pcie_print_link_status() to report PCIe link speed and possible
      limitations instead of implementing this in the driver itself.  This finds
      the slowest link in the path to the device by computing the total bandwidth
      of each link and compares that with the capabilities of the device.
      
      The dmesg change is:
      
        - PCIe: Speed %s Width x%d
        + %u.%03u Gb/s available PCIe bandwidth (%s x%d link)
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      af125b75
    • B
      bnx2x: Report PCIe link properties with pcie_print_link_status() · cc04a1dd
      Bjorn Helgaas 提交于
      Previously the driver used pcie_get_minimum_link() to warn when the NIC
      is in a slot that can't supply as much bandwidth as the NIC could use.
      
      pcie_get_minimum_link() can be misleading because it finds the slowest link
      and the narrowest link (which may be different links) without considering
      the total bandwidth of each link.  For a path with a 16 GT/s x1 link and a
      2.5 GT/s x16 link, it returns 2.5 GT/s x1, which corresponds to 250 MB/s of
      bandwidth, not the true available bandwidth of about 1969 MB/s for a
      16 GT/s x1 link.
      
      Use pcie_print_link_status() to report PCIe link speed and possible
      limitations instead of implementing this in the driver itself.  This finds
      the slowest link in the path to the device by computing the total bandwidth
      of each link and compares that with the capabilities of the device.
      
      The dmesg change is:
      
        - %s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM
        + %s (%c%d) PCI-E found at mem %lx, IRQ %d, node addr %pM
        + %u.%03u Gb/s available PCIe bandwidth (%s x%d link)
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      cc04a1dd
  2. 12 4月, 2018 6 次提交
  3. 04 4月, 2018 2 次提交
  4. 02 4月, 2018 2 次提交
  5. 01 4月, 2018 16 次提交
  6. 30 3月, 2018 6 次提交
  7. 27 3月, 2018 4 次提交
  8. 26 3月, 2018 2 次提交