Ensure that platform maintainers check the CPU part number in the right
manner: the CPU part number is meaningless without also checking the
CPU implement(e|o)r (choose your preferred spelling!)  Provide an
interface which returns both the implementer and part number together,
and update the definitions to include the implementer.

Mark the old function as being deprecated... indeed, using the old
function with the definitions will now always evaluate as false, so
people must update their un-merged code to the new function.  While
this could be avoided by adding new definitions, we'd also have to
create new names for them which would be awkward.
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Chromebook firmware doesn't enable the CCI for the boot cpu, and
arguably it shouldn't have to either. Let's have the kernel handle the

CCI on its own for the boot CPU the same way it does it for secondary CPUs
by using the MCPM loopback.

This allows to boot all 8 cores on exynos5420-peach-pit,
exynos5800-peach-pi and ARM Chromebook 2.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Tested-by: NTushar Behera <tushar.b@samsung.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On exynos mcpm systems the firmware is hardcoded to jump to an address
in SRAM (0x02073000) when secondary CPUs come up.  By default the
firmware puts a bunch of code at that location.  That code expects the
kernel to fill in a few slots with addresses that it uses to jump back
to the kernel's entry point for secondary CPUs.

Originally (on prerelease hardware) this firmware code contained a
bunch of workarounds to deal with boot ROM bugs.  However on all
shipped hardware we simply use this code to redirect to a kernel
function for bringing up the CPUs.

Let's stop relying on the code provided by the bootloader and just
plumb in our own (simple) code jump to the kernel.  This has the nice
benefit of fixing problems due to the fact that older bootloaders
(like the one shipped on the Samsung Chromebook 2) might have put
slightly different code into this location.

Once suspend/resume is implemented for systems using exynos-mcpm we'll
need to make sure we reinstall our fixed up code after resume.  ...but
that's not anything new since IRAM (and thus the address of the
mcpm_entry_point) is lost across suspend/resume anyway.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since commit 166aaf39 ("ARM: 8029/1: mcpm: Rename the power_down_finish()
functions to be less confusing") changed the name of power_down_finish to
wait_for_cpu_powerdown, so use new member name wait_for_cpu_powerdown.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The exynos5800 is very similar to exynos5420. We can re-use
the existing MCPM support for exynos5800 for secondary boot
-up and switching.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add machine-dependent MCPM call-backs for Exynos5420. These are used
to power up/down the secondary CPUs during boot, shutdown, s2r and
switching.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NInderpal Singh <inderpal.s@samsung.com>
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>