- 25 3月, 2017 1 次提交
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由 Alexey Brodkin 提交于
MotherBoard section has its "ranges" set to 0xE000_0000-0xF000_0000. But UIO node maps 4 different areas in different memory locations and all outside MB's ranges. That obviously breaks UIO mappings in runtime. Cc: Ruud Derwig <rderwig@synopsys.com> Cc: stable@vger.kernel.org Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 06 3月, 2017 2 次提交
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由 Vlad Zakharov 提交于
Trying to get clock for CPU cores on SMP systems I found that I was only able to get clock for core[0]. That was because only one cpu@0 node was represented in ARC HS device tree and it was impossible to get clock for "non-existing" cores. So as ARC HS may have up to 4 cores we update device tree to match maximum possible cores quantity. Signed-off-by: NVlad Zakharov <vzakhar@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vlad Zakharov 提交于
ARC CPU cores are driven by core_clk so we add corresponding "clocks" property to ARC cpu nodes. Signed-off-by: NVlad Zakharov <vzakhar@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 07 2月, 2017 4 次提交
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由 Yuriy Kolerov 提交于
Signed-off-by: NYuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Yuriy Kolerov 提交于
No need for specifying a list of interrupts in the declaration of IDU interrupt controller anymore since the kernel can obtain a number of supported interrupts from the build register. Also delete support of the second parameter for devices which are connected to IDU because it is not used anywhere. Signed-off-by: NYuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Alexey Brodkin 提交于
ARC VDK for EVSS uses UIO for communication with Embedded Vision Subsystem. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Alexey Brodkin 提交于
ARC VDK virtual platform emulates host MMC controller (DW Mobile Storage) and moreover rootfs is situated on that virtual card. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 01 12月, 2016 2 次提交
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由 Alexey Brodkin 提交于
Up until now we had ARC PGU not enabled in axs10x defconfigs trying to not bloat kernel image again with yet another drivers and subsystems. This change configures ARC PGU (as well as DRM bits it depends on) to be built as a module and so those who need LCD screen to work on axs10x may bundle built .ko files in their target's file-system with help of the following command on host: ------------->8------------- make INSTALL_MOD_PATH=_path_to_target_fs_ modules_install ------------->8------------- and later on target with commands as simple as: ------------->8------------- modprobe adv7511.ko modprobe arcpgu.ko ------------->8------------- get LCD working. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
There are more ARC Linux HAPS users than Zebu ones. Same kernel would work fine on both, even with embedded DT, assuming the FPGA bitfile configuration is same Suggested-by: NFrancois Bedard <fbedard@ynopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 30 11月, 2016 1 次提交
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由 Eugeniy Paltsev 提交于
Several versions of DW DMAC have multi block transfers hardware support. Hardware support of multi block transfers is disabled by default if we use DT to configure DMAC and software emulation of multi block transfers used instead. Add multi-block property, so it is possible to enable hardware multi block transfers (if present) via DT. Switch from per device is_nollp variable to multi_block array to be able enable/disable multi block transfers separately per channel. Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 01 11月, 2016 1 次提交
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由 Alexey Brodkin 提交于
Now when we have properly working performance counters in nSIM even with interrupt support (fix should be a part of upcoming nSIM engineering build 2016.12-005) we may enable perf support by default for all platforms that use nSIM for ARC cores simulation. Note 1: PCT node was missing for some reason in nsimosci.dts while all other nSIM-related .dts files already had PCT node for quite some time, so adding it now. Note 2: All defconfigs were regenerated with "make savedefconfig" which led to some clean-ups in nsimosci_hs_smp_defconfig: CONFIG_FRAMEBUFFER_CONSOLE=y was removed because it is automatically selected now by DRM. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 01 10月, 2016 2 次提交
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由 Vineet Gupta 提交于
The cool thing is that same kernel image can run on - nsim OSCI simulation platform - SDPlite FPGA setups Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Alexey Brodkin 提交于
As it was discussed quite some time ago (see https://lkml.org/lkml/2015/11/5/862) it's a good practice to add "model" property in .dts. Moreover as per ePAPR "model" property is required and should look like "manufacturer,model" so we do here. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh@kernel.org> Cc: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 13 6月, 2016 2 次提交
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由 Alexey Brodkin 提交于
With required ARC PGU updates that allow it to be used on simulation platforms we may finally utilize ARC PGU in nSIM OSCI virtual platforms with modern Linux kernels. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
With required ARC PGU updates that allow it to be used on simulation platforms we may finally utilize ARC PGU in HS38 VDK with modern Linux kernels. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 30 5月, 2016 1 次提交
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由 Alexey Brodkin 提交于
Now when we switched to usage of real clk devices for CPU core frequency those root properties make no sense any longer. Se we're just getting rid of them here to not confuse readers of our .dts files. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Christian Ruppert <christian.ruppert@alitech.com> Cc: Noam Camus <noamca@mellanox.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 18 5月, 2016 1 次提交
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由 Alexey Brodkin 提交于
The most recent release of AXS103 [v1.1] is proven to work at 100 MHz in dual-core mode so this change uses mentioned feature. For that we: * Update axc003_idu.dtsi with mention of really-used CPU clock freq * Remove clock override in AXS platform code for dual-core HW Note we're still leaving a hack for clock "downgrade" on early boot for quad-core hardware. Also note this change will break functionality of AXS103 v1.0 hardware. That means all users of AXS103 __must__ upgrade their boards with the most recent firmware. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 13 5月, 2016 1 次提交
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由 Jose Abreu 提交于
Add device tree bindings for AXS10X I2S PLL Clock driver. Acked-by: NAlexey Brodkin <abrodkin@synopsys.com> Acked-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NJose Abreu <joabreu@synopsys.com>
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- 09 5月, 2016 5 次提交
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由 Noam Camus 提交于
Adding default configuration file and DTS file Signed-off-by: NNoam Camus <noamc@ezchip.com>
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由 Vineet Gupta 提交于
ARC Timers have historically been probed directly. As precursor to start probing Timers thru DT introduce these bindings Note that to keep series bisectable, these bindings are not yet used in code. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: devicetree@vger.kernel.org Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
This allows us to introduce timers in DT in next commit The core clk frequency hack in AXS103 platform is also extended, where the core clk feeding into timers is updated in-place in FDT. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
This is again for future changes to use common DTSI for timers which refer to @core_intc Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
... and add them to plat-sim DTS. This allows for future change to introduce timers in DT in single place Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 02 5月, 2016 1 次提交
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由 Andy Shevchenko 提交于
There several changes are done here: - Convert the property to be in bytes Besides that this is a common practice for such property, the use of a value in bytes much more convenient than handling the encoded one. - Rename data_width to data-width in the device tree bindings The change leaves the support for the old format as well just in case someone will use a newer kernel with an old device tree blob. - While here, replace dwc_fast_ffs() by __ffs() Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 29 4月, 2016 1 次提交
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由 Alexey Brodkin 提交于
Allocation of a frame buffer memory in a special memory region allows bypassing of so-called IO Coherency aperture which is typically set as a range 0x8z-0xAz. I.e. all data traffic to PGU bypasses IO Coherency block and saves its bandwidth for other peripherals. Even though for AXS101 (which sorts ARC770 CPU) IOC is not an option for a sake of keeping one DT description for the base-board (axs10x_mb.dtsi) we're still defining reserved memory location in the very end of DDR. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Acked-by: NVineet Gupta <vgupta@synopsys.com> Cc: devicetree@vger.kernel.org
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- 26 4月, 2016 1 次提交
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由 Alexey Brodkin 提交于
Synopsys DesignWare ARC SDP boards sport ARC SDP display controller attached to ADV7511 HDMI encoder. That change adds desctiption of both ARC PGU and ADV7511 in ARC SDP'd base-board Device Tree. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: devicetree@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org
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- 07 4月, 2016 1 次提交
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由 Vineet Gupta 提交于
This reverts commit 667a490b. This is needed to get ethernet(stmmac) working in 4.6-rc2 on axs103. 4.5 needed this fix, but apprently stmmac has gained some fixes which warrant reversal of this. Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 17 3月, 2016 1 次提交
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由 Alexey Brodkin 提交于
Commit e34d6569 ("stmmac: create of compatible mdio bus for stmmac driver") broke DW GMAC functionality on ARC AXS10x boards: That's what happens on eth0 up: --------------------------->8------------------------ | libphy: PHY stmmac-0:ffffffff not found | eth0: Could not attach to PHY | stmmac_open: Cannot attach to PHY (error: -19) --------------------------->8------------------------ Simplest solution is to add PHY description in board's .dts. And so we do here. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Rob Herring <robh@kernel.org> Cc: Phil Reid <preid@electromag.com.au> Cc: David S. Miller <davem@davemloft.net> Cc: linux-kernel@vger.kernel.org Cc: netdev@vger.kernel.org Cc: stable@vger.kernel.org # 4.5 Reviewed-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 15 3月, 2016 1 次提交
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由 Lada Trimasova 提交于
Since ezchip network driver was adapted to little endian architecture this patch provides the corresponding arch/arc/{boot/dts,configs}/ updates so we can switch over to this device-model/driver for OSCI platform. Cc: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NLada Trimasova <ltrimas@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 12 3月, 2016 1 次提交
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由 Vineet Gupta 提交于
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 17 12月, 2015 1 次提交
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由 Vineet Gupta 提交于
HIGHMEM support bumped the default memory size for nsim platform to 1G. Thus total memory ended at the very edge of start of peripherals address space. With linux link base shifted, memory started bleeding into peripheral space which caused early boot bad_page spew ! Fixes: 29e33226 ("ARC: mm: HIGHMEM: populate high memory from DT") Reported-by: NAnton Kolesov <akolesov@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 07 12月, 2015 1 次提交
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由 Alexey Brodkin 提交于
Current ARC SDP boards cannot reliably handle 1Gbit Ethernet connections due to limitations in hardware. To make sure networking is stable on the board we're limiting phy to 100 Mbit. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 28 10月, 2015 4 次提交
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由 Vineet Gupta 提交于
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Rob Herring 提交于
Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs are not really dependent on a platform being enabled or any other kernel config, so for testing coverage it is convenient to build all of the dtbs. This builds all dts files in the tree, not just targets listed. Signed-off-by: NRob Herring <robh@kernel.org> Acked-by: NVineet Gupta <vgupta@synopsys.com>
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由 Rob Herring 提交于
Use dtb-y and always make variables to build dtbs instead of explicit dtbs rule. This is in preparation to support building all dtbs. Signed-off-by: NRob Herring <robh@kernel.org> Acked-by: NVineet Gupta <vgupta@synopsys.com>
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- 20 8月, 2015 1 次提交
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由 Vineet Gupta 提交于
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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- 09 7月, 2015 1 次提交
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由 Alexey Brodkin 提交于
With up-to-date FPGA builds ARC cores are supposed to correctly operate even with 90 MHz clock (which is a target frequency for AXS103 release). Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: arc-linux-dev@synopsys.com
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- 25 6月, 2015 2 次提交
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由 Ruud Derwig 提交于
- CONFIG_ARC_UBOOT_SUPPORT to handle arguments passed in r0, r1, r2 - CONFIG_DEVTMPFS_MOUNT for mouting rootfs since it uses external cpio for rootfs Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NRuud Derwig <rderwig@synopsys.com> [vgupta: folded the Main baord DT files for smp/up into one] Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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由 Vineet Gupta 提交于
Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
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