- 17 9月, 2009 1 次提交
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由 Mark Brown 提交于
The WM831x series of PMICs contain RTC functionality. The hardware provides a 32 bit counter incrementing at 1Hz together with a per tick interrupt and an alarm value. For simplicity the driver chooses to define the epoch for the counter as the Unix epoch - if required platform data can be used in future to customise this. When powered on from a completely cold state the RTC reports that it has not been configured - when this happens an error is returned when attempting to read the RTC in order to avoid use of values we know to be invalid. The hardware also provides security features which mean that it can ignore attempts to set the RTC time in certain circumstances, most notably if the RTC is written to too often. These errors are detected by verifying the written RTC value. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NAlessandro Zummo <a.zummo@towertech.it> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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