- 15 9月, 2009 1 次提交
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由 Paul Mundt 提交于
Type mismatch caused the page deref to blow up, fix it up as per the sh4 change. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 09 9月, 2009 1 次提交
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由 Paul Mundt 提交于
There was quite a lot of tab->space damage done here from a former patch, clean it up once and for all. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 08 9月, 2009 1 次提交
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由 Paul Mundt 提交于
This fixes up a number of outstanding issues observed with old mappings on the same colour hanging around. This requires some more optimal handling, but is a safe fallback until all of the corner cases have been handled. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 03 9月, 2009 1 次提交
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由 Paul Mundt 提交于
This fixes up the kmap_coherent/kunmap_coherent() interface for recent changes both in the page fault path and the shared cache flushers, as well as adding in some optimizations. One of the key things to note here is that the TLB flush itself is deferred until the unmap, and the call in to update_mmu_cache() itself goes away, relying on the regular page fault path to handle the lazy dcache writeback if necessary. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 01 9月, 2009 3 次提交
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由 Paul Mundt 提交于
This builds on top of the previous reversion and implements a special on_each_cpu() variant that simple disables preemption across the call while leaving the interrupt state to the function itself. There were some unintended consequences with IRQ disabling in some of these paths on UP that ran in to a deadlock scenario with IRQs being missed. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This reverts commit 64a6d722. Unfortunately we can't use on_each_cpu() for all of the cache ops, as some of them only require preempt disabling. This seems to be the same issue that impacts the mips r4k caches, where this code was based on. This fixes up a deadlock that showed up in some IRQ context cases. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Matt Fleming 提交于
This adopts the special-cased 2-way write-through dcache flusher for N-ways and moves it in to the generic path. Assignment is done at runtime via the check for the CCR_CACHE_WT bit in the same path as the per-way writeback flushers. Signed-off-by: NMatt Fleming <matt@console-pimps.org> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 27 8月, 2009 1 次提交
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 24 8月, 2009 3 次提交
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由 Stuart Menefy 提交于
Change the method used to flush the cache in write-through mode to avoid corrupted data being written back to memory. Signed-off-by: NStuart Menefy <stuart.menefy@st.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Stuart Menefy 提交于
Allow peripherals before the start of RAM to be remapped. Signed-off-by: NStuart Menefy <stuart.menefy@st.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Stuart Menefy 提交于
This is a pure documentation, to try to explain why the cache flushing code for the SH4 is implemented the way it is. Signed-off-by: NStuart Menefy <stuart.menefy@st.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 21 8月, 2009 3 次提交
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由 Paul Mundt 提交于
on_each_cpu() takes care of IRQ and preempt handling, the localized handling in each of the called functions can be killed off. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Yoshihiro Shimoda 提交于
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This does a bit of rework for making the cache flushers SMP-aware. The function pointer-based flushers are renamed to local variants with the exported interface being commonly implemented and wrapping as necessary. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 20 8月, 2009 2 次提交
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由 Paul Mundt 提交于
mapping is unused on the SMP build, trigger a build error. Move it under the ifdef. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Michael Trimarchi 提交于
Signed-off-by: NMichael Trimarchi <trimarchimichael@yahoo.it> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 19 8月, 2009 1 次提交
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由 Paul Mundt 提交于
This fixes up the build when caches are disabled, by linking in all of the cache routines directly. This paves the way for splitting out separate I and D cache disabling, similar to what sh64 had, and which we want for SH-X3 anyways. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 16 8月, 2009 4 次提交
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由 Paul Mundt 提交于
Now that there is sufficient shared infrastructure, merge the Makefiles. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Now that the SH-5 code is more or less behaving with the new cacheflush interface, wire up the initialization code. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
These will be handled through the shared cache interface instead, and they are presently undefined anyways. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 15 8月, 2009 19 次提交
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由 Paul Mundt 提交于
The caches enabled case needs more work, but is presently broken regardless, so this can be done incrementally. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This paves the way for allowing individual CPUs to overload the individual flushing routines that they care about without having to depend on weak aliases. SH-4 is converted over initially, as it wires up pretty much everything. The majority of the other CPUs will simply use the default no-op implementation with their own region flushers wired up. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
We use flush_cache_page() outright in copy_to_user_page(), and nothing else needs it, so just kill it off. SH-5 still defines its own version, but that too will go away in the same fashion once it converts over. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
flush_dcache_all() is used internally by the SH-4 cache code, it is not part of the exported cache API, so make it static and don't export it. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This migrates the alias computation and printing of probed cache parameters from the SH-4 code to the shared cpu_cache_init(). This permits other platforms with aliases to make use of the same probe logic without having to roll their own, and also produces consistent output regardless of platform. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This provides a central point for CPU cache initialization routines. This replaces the antiquated p3_cache_init() method, which the vast majority of CPUs never cared about. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
These were previous littered around tlb-nommu.c and pg-nommu.c, though at this point there are more stubs than are strictly TLB or page op related, so just consolidate them in a single nommu.c. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This does a bit of reorganizing for allowing nommu to use the new and generic cache.c, no functional changes. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This builds in the newly created cache.c (renamed from pg-mmu.c) for both MMU and NOMMU configurations. The kmap_coherent() stubs and alias information recorded by each CPU family takes care of doing the right thing while enabling the code to be commonly shared. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This plugs in kmap_coherent() for the non-SH4 cases to permit the pg-mmu.c bits to be used generically across all CPUs. SH-5 is still in the TODO state, but will move over to fixmap and the generic interface gradually. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This kills off the ifdef from kmap_coherent_init() and just bails if there are no cache aliases. This permits the kmap coherent code to be used on other CPUs. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This only bothers with the TLB entry flush in the case of the initial page write exception, as it is unecessary in the case of the load/store exceptions. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This adds a bit of rework to have the TLB protection violations skip the TLB miss fastpath and go directly in to do_page_fault(), as these require slow path handling. Based on an earlier patch by SUGIOKA Toshinobu. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This optimizes for the cases when a CPU does not yet have a valid ASID context associated with it, as in this case there is no work for any of flush_cache_mm()/flush_cache_page()/flush_cache_range() to do. Based on the the MIPS implementation. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Now with all of the prep work out of the way, kill off the SH-5 variants and use the SH-4 version directly. This also takes advantage of the unrolling that was previously done for the new version. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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