This adds support for multiple vectors per unique IRQ masking source on
the SH-X3 proto CPU.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up broken clock re-parenting undertaken by the SH7709 clock
framework code, which is currently in conflict with the legacy CPG
framework. With this change in place, the legacy CPG ancestry is used,
and we manage to avoid contending on the clock_list_sem mutex, which is
already held under the legacy registration path, resulting in livelock.

In order for SH7709 to fully support the varying clock modes, it needs to
implement a more complete clock framework. After this change it is in
sync with legacy CPG mode, which ends up being the default configuration
for this CPU anyways.
Signed-off-by: NRafael Ignacio Zurita <rizurita@yahoo.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The kgdb stub has traditionally tied in to the NMI slot, and manually
handled debounce. Now that we have a generic way to do this instead, all
of the stub-specific debounce silliness can be killed off.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements support for NMI debugging that was shamelessly copied
from the avr32 port. A bit of special magic is needed in the interrupt
exception path given that the NMI exception handler is stubbed in to the
regular exception handling table despite being reported in INTEVT. So we
mangle the lookup and kick off an EXPEVT-style exception dispatch from
the INTEVT path for exceptions that do_IRQ() has no chance of handling.
As a result, we also drop the evt2irq() conversion from the do_IRQ() path
and just do it in assembly.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

It is possible for the CPU to re-enable it's interrupt block bit
before the write to the interrupt controller has actually masked out
the external interupt at the controller. We get around this by
reading back from the interrupt controller which will ensure the
write has happened.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The SH instruction set has several instructions which accept an 8 bit
immediate operand. For logical instructions this operand is zero extended,
for arithmetic instructions the operand is sign extended. After adding an
option to the assembler to check this, it was found that several pieces
of assembly code were assuming this behaviour, and in one case
getting it wrong.

So this patch explicitly sign extends any immediate operands, which makes
it obvious what is happening, and fixes the one case which got it wrong.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The Runtime PM patch for UIO driver implements coarse grained
dynamic power management for UIO devices. With that patch in
place we can get rid of the static clock configuration. Which
in turn makes it possible for cpuidle to enter deeper sleep.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The runtime PM for SH-Mobile code had platform_bus_notify() as __devinit,
which is rather bogus. Kill off the annotation, which subsequently
silences the section mismatch warnings.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch is V3 of the SuperH Mobile Runtime PM platform bus
implentation matching Rafael's Runtime PM v16.

The code gets invoked from the SuperH specific Runtime PM
platform bus functions that override the weak symbols for:
 - platform_pm_runtime_suspend()
 - platform_pm_runtime_resume()
 - platform_pm_runtime_idle()

This Runtime PM implementation performs two levels of power
management. At the time of platform bus runtime suspend the
clock to the device is stopped instantly. Later on if all
devices within the power domain has their clocks stopped
then the device driver ->runtime_suspend() callbacks are
used to save hardware register state for each device.

Device driver ->runtime_suspend() calls are scheduled from
cpuidle context using platform_pm_runtime_suspend_idle().
When all devices have been fully suspended the processor
is allowed to enter deep sleep from cpuidle.

The runtime resume operation turns on clocks and also
restores registers if needed. It is worth noting that the
devices start in a suspended state and the device driver
is responsible for calling runtime resume before accessing
the actual hardware.

In this particular platform bus implementation runtime
resume is not allowed from interrupt context. Runtime
suspend is however allowed from interrupt context as
long as the synchronous functions are avoided.

[ updated for v17 -- PFM. ]
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

When CONFIG_DWARF_UNWINDER is enabled setup r14 in handle_interrupt, so
that we can figure out what function was running when we were
interrupted.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up the clockevents broadcasting code as detailed in commit
ee348d5a ("[ARM] realview: fix broadcast
tick support"). This saves us from having to do strange ordering things
with the broadcast clockevent device, relying on the rating instead.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch updates the FRQCRA.IFC divisor values for SH7724. Despite
not being initially documented, the / 3 mode is also support for the IFC
division.
Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

save_regs contains an SR modification without an irqflags annotation,
which resulted in a missing TRACE_IRQS_OFF in the interrupt exception
path on SH-3/SH4.

I've also moved the TRACE_IRQS_OFF/ON annotation when returning from the
interrupt to just before we call __restore_all. This seems like the most
logical place to put this because the annotation is for when we restore
the SR register so we should delay the annotation until as last as
possible.

We were also missing a TRACE_IRQS_OFF in resume_kernel when
CONFIG_PREEMPT is enabled.

The end result is that this fixes up the lockdep engine debugging support
with CONFIG_PREEMPT enabled on all SH-3/4 parts.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds "SuperH Mobile Standby Mode [SF]" to the list
of cpuidle sleep modes. If the software latency requirements
from cpuidle are met together with fulfilled hardware
requirements then deep sleep modes can be entered.

Tested on sh7722 and sh7724 with "Sleep Mode", "Sleep Mode + SF"
and "Software Standby Mode + SF" together with a multimedia
work load and flood ping without packet drop.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch updates the exception handling in the sleep code
for SuperH Mobile. With the patch applied the sleep code
always rewrites the VBR and resumes from the exception vector,
re-initializes hardware and jumps straight to the original
interrupt vector.

Tested on sh7722 and sh7724 with "Sleep Mode", "Sleep Mode + SF"
and "Software Standby Mode + SF" with CONFIG_SUSPEND.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This is superfluous, as the default CPU type and family are already
established by the initial cpuinfo definition. Given that we are still
able to probe for the CPU family even if we are not able to detect the
subtype, it's preferable to let the probing code fill out what it can and
leave the rest.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch updates the SuperH Mobile sleep assembly code with
support for DBSC memory controller found in the sh7724 processor.

Without this fix the memory hooked up to the sh7724 processor
will never enter self-refresh mode before suspending to ram. The
effect of this is that the memory contents most likeley will be
lost upon resume which may or may not be what you want.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds a family member to struct sh_cpuinfo, which allows us to fall
back more on the probe routines to work out what sort of subtype we are
running on. This will be used by the CPU cache initialization code in
order to first do family-level initialization, followed by subtype-level
optimizations.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This does a bit of reorganizing for allowing nommu to use the new
and generic cache.c, no functional changes.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements EXPMASK initialization code for SH-4A parts, where it is
possible to disable compat features that will go away in newer cores.
Presently this includes disabling support for non-nop instructions in the
rte delay slot, as well as a sleep instruction being placed in a delay
slot (neither of which the kernel does any longer). As a result of this,
any future offenders will have illegal slot exceptions generated for
them.

Associative writes for the memory-mapped cache array are still left
enabled, until such a point that special cache operations for SH-4A are
provided to move off of the current (and rather dated) SH-4 versions.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Future SH parts do not support any instruction but a nop in the rte delay
slot, so make the change for all offending parts. SH-5 is excluded from
this, and already has its own set of restrictions with regards to rte
delay slot handling.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This only bothers with the TLB entry flush in the case of the initial
page write exception, as it is unecessary in the case of the load/store
exceptions.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds a bit of rework to have the TLB protection violations skip the
TLB miss fastpath and go directly in to do_page_fault(), as these require
slow path handling.

Based on an earlier patch by SUGIOKA Toshinobu.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

In order to use DWARF unwinder info the frame register has to contain a
valid value. Whilst GCC takes care of this for C code, we have to do it
ourselves for assembly.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the processor platform device setup
functions from __initcall() and sometimes
device_initcall() to arch_initcall().

This makes sure that the platform devices are
registered a bit earlier so the devices are
available when drivers register using initcall
levels earlier than device_initcall().

A good example is platform devices needed by
i2c-sh_mobile.c which registers a bit earlier
using subsys_initcall().
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add hwblk_id to on-chip sh7724 platform devices.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add hwblk_id to on-chip sh7723 platform devices.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add hwblk_id to on-chip sh7722 platform devices.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch removes the unused MSTPCRn register definitions
from the SuperH Mobile code for sh7722, sh7723 and sh7724.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds hwblk support for the sh7724 processor.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the processor platform device setup
functions from __initcall() and sometimes
device_initcall() to arch_initcall().

This makes sure that the platform devices are
registered a bit earlier so the devices are
available when drivers register using initcall
levels earlier than device_initcall().

A good example is platform devices needed by
i2c-sh_mobile.c which registers a bit earlier
using subsys_initcall().
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the m66592-udc driver to use the on_chip flag
from platform data to enable on chip behaviour instead
of relying on CONFIG_SUPERH_BUILT_IN_M66592 ugliness.

This makes the code cleaner and also allows us to support
both external and internal m66592 with the same kernel.

It also makes the Kconfig part more future proof since
we with this patch can add support for new processors
with on-chip m66592 without modifying the Kconfig.

The patch adds a m66592 header file for platform data
and ties in platform data to the existing m66592 devices.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the r8a66597-hcd driver to use the on_chip flag
from platform data to enable on chip behaviour instead
of relying on CONFIG_SUPERH_ON_CHIP_R8A66597 ugliness.

This makes the code cleaner and also allows us to support
both external and internal r8a66597 with the same kernel.

It also makes the Kconfig part more future proof since
we with this patch can add support for new processors
with on-chip r8a66597 without modifying the Kconfig.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds hwblk support for the sh7723 processor.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Extend the SuperH hwblk code to support more than one counter.
Contains ground work for the future Runtime PM implementation.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds cpuidle support for SuperH Mobile.

The sleep mode selected by cpuidle is compared with
the mode selected by the hwblk sleep code and the
best allowed mode is entered.

At this point "Sleep mode" and "Sleep mode + SF" are
supported. This code can easily be extended to support
"Software suspend mode", but the assembly code must
first be updated to avoid loosing interrupts.

Also, update the code to only copy the assembly snippet
into internal memory once at bootup.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch contains the sh7722 specific hwblk implementation.

Hwblk ids are added to the processor specific header file,
module stop bits and areas are kept track of as hwblks,
clocks are converted to make use of the shared hwblk code.
Code to determine allowed sleep modes is also added.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch is the hwblk base implementation, containing
structures and shared functions dealing with hardware blocks.

A each processor model should provide a list of hwblks and
describe which module stop bit that is associated with each
hwblck and how the hwblks are grouped together into areas.

The shared code keeps track of the usage count for each
hwblk and the areas. Fallback implementations for processor
specific code are also kept as weak symbols.

The clock framework, the runtime pm code and cpuidle will
all tie into this hwblk implementation.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>