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  1. 17 9月, 2009 1 次提交
    • R
      Blackfin: make EVT3->EVT5 lowering more robust wrt IPEND[4] · ae4f073c
      由 Robin Getz 提交于 
      We handle many exceptions at EVT5 (hardware error level) so that we can
catch exceptions in our exception handling code.  Today - if the global
interrupt enable bit (IPEND[4]) is set (interrupts disabled) our trap
handling code goes into a infinite loop, since we need interrupts to be
on to defer things to EVT5.

Normal kernel code should not trigger this for any reason as IPEND[4] gets
cleared early (when doing an interrupt context save) and the kernel stack
there should be sane (or something much worse is happening in the system).
But there have been a few times where this has happened, so this change
makes sure we dump a proper crash message even when things have gone south.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
      ae4f073c
  3. 16 7月, 2009 1 次提交
  5. 23 6月, 2009 1 次提交
  7. 13 6月, 2009 2 次提交
  9. 12 6月, 2009 2 次提交
    • R
      Blackfin: make deferred hardware errors more exact · b9a3899d
      由 Robin Getz 提交于 
      Hardware errors on the Blackfin architecture are queued by nature of the
hardware design.  Things that could generate a hardware level queue up at
the system interface and might not process until much later, at which
point the system would send a notification back to the core.

As such, it is possible for user space code to do something that would
trigger a hardware error, but have it delay long enough for the process
context to switch.  So when the hardware error does signal, we mistakenly
evaluate it as a different process or as kernel context and panic (erp!).
This makes it pretty difficult to find the offending context.  But wait,
there is good news somewhere.

By forcing a SSYNC in the interrupt entry, we force all pending queues at
the system level to be processed and all hardware errors to be signaled.
Then we check the current interrupt state to see if the hardware error is
now signaled.  If so, we re-queue the current interrupt and return thus
allowing the higher priority hardware error interrupt to process properly.
Since we haven't done any other context processing yet, the right context
will be selected and killed.  There is still the possibility that the
exact offending instruction will be unknown, but at least we'll have a
much better idea of where to look.

The downside of course is that this causes system-wide syncs at every
interrupt point which results in significant performance degradation.
Since this situation should not occur in any properly configured system
(as hardware errors are triggered by things like bad pointers), make it a
debug configuration option and disable it by default.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
      b9a3899d
    • G
      Blackfin: fix link failure due to CONFIG_EXCEPTION_L1_SCRATCH · f82e0a0c
      由 Graf Yang 提交于 
      Move exception stack mess from entry.S to init.c to fix link failure when
CONFIG_EXCEPTION_L1_SCRATCH is in use.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
      f82e0a0c
  11. 27 5月, 2009 1 次提交
  13. 04 3月, 2009 1 次提交
  15. 04 2月, 2009 1 次提交
  17. 07 1月, 2009 1 次提交
    • B
      Blackfin arch: Faster C implementation of no-MPU CPLB handler · dbdf20db
      由 Bernd Schmidt 提交于 
      This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code.

We ditch the old cplb-nompu implementation, which is a good example of
why a good algorithm in a HLL is preferrable to a bad algorithm written in
assembly.  Rather than try to construct a table of all posible CPLBs and
search it, we just create a (smaller) table of memory regions and
their attributes.  Some of the data structures are now unified for both
the mpu and nompu cases.  A lot of needless complexity in cplbinit.c is
removed.

Further optimizations:
  * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving
    these registers on the stack when entering a CPLB exception.
  * lose cli/nop/nop/sti sequences for some workarounds - these don't
  * make
    sense in an exception context

Additional code unification should be possible after this.

[Mike Frysinger <vapier.adi@gmail.com>:
 - convert CPP if statements to C if statements
 - remove redundant statements
 - use a do...while loop rather than a for loop to get slightly better
   optimization and to avoid gcc "may be used uninitialized" warnings ...
   we know that the [id]cplb_nr_bounds variables will never be 0, so this
   is OK
 - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten,
   we can punt it
 - add some BUG_ON() checks to make sure we dont overflow the small
   cplb_bounds array
 - add i/d cplb entries for the bootrom because there is functions/data in
   there we want to access
 - we do not need a NULL trailing entry as any time we access the bounds
   arrays, we use the nr_bounds variable
]
Signed-off-by: NMichael McTernan <mmcternan@airvana.com>
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
      dbdf20db
  19. 18 11月, 2008 3 次提交
  21. 07 1月, 2009 1 次提交
  23. 28 10月, 2008 2 次提交
  25. 09 10月, 2008 2 次提交
  27. 13 10月, 2008 1 次提交
  29. 08 10月, 2008 1 次提交
  31. 27 8月, 2008 1 次提交
  33. 14 8月, 2008 1 次提交
  35. 05 8月, 2008 2 次提交
  37. 26 7月, 2008 1 次提交
  39. 07 5月, 2008 2 次提交
  41. 07 3月, 2008 1 次提交
  43. 25 4月, 2008 1 次提交
  45. 23 4月, 2008 1 次提交
    • B
      [Blackfin] arch: fix bug - when using trace buffer with CONFIG_MPU enabled. · 2a0c4fdb
      由 Bernd Schmidt 提交于 
      There were a couple of problems with the way the trace buffer state
is saved/restored in assembly.  The DEBUG_HWTRACE_SAVE/RESTORE macros
save a value to the stack, which is not immediately obvious; the CPLB
exception code needed changes to load the correct value of the stack
pointer.  The other problem is that the SAVE/RESTORE macros weren't
pushing and popping the value downwards on the stack, but rather moving
it _upwards_, which is of course completely broken.

We also need to make sure there's a matching DEBUG_HWTRACE_RESTORE in
the error case of the CPLB handler.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
      2a0c4fdb
  47. 06 2月, 2008 1 次提交
    • D
      timerfd: new timerfd API · 4d672e7a
      由 Davide Libenzi 提交于 
      This is the new timerfd API as it is implemented by the following patch:

int timerfd_create(int clockid, int flags);
int timerfd_settime(int ufd, int flags,
		    const struct itimerspec *utmr,
		    struct itimerspec *otmr);
int timerfd_gettime(int ufd, struct itimerspec *otmr);

The timerfd_create() API creates an un-programmed timerfd fd.  The "clockid"
parameter can be either CLOCK_MONOTONIC or CLOCK_REALTIME.

The timerfd_settime() API give new settings by the timerfd fd, by optionally
retrieving the previous expiration time (in case the "otmr" parameter is not
NULL).

The time value specified in "utmr" is absolute, if the TFD_TIMER_ABSTIME bit
is set in the "flags" parameter.  Otherwise it's a relative time.

The timerfd_gettime() API returns the next expiration time of the timer, or
{0, 0} if the timerfd has not been set yet.

Like the previous timerfd API implementation, read(2) and poll(2) are
supported (with the same interface).  Here's a simple test program I used to
exercise the new timerfd APIs:

http://www.xmailserver.org/timerfd-test2.c

[akpm@linux-foundation.org: coding-style cleanups]
[akpm@linux-foundation.org: fix ia64 build]
[akpm@linux-foundation.org: fix m68k build]
[akpm@linux-foundation.org: fix mips build]
[akpm@linux-foundation.org: fix alpha, arm, blackfin, cris, m68k, s390, sparc and sparc64 builds]
[heiko.carstens@de.ibm.com: fix s390]
[akpm@linux-foundation.org: fix powerpc build]
[akpm@linux-foundation.org: fix sparc64 more]
Signed-off-by: NDavide Libenzi <davidel@xmailserver.org>
Cc: Michael Kerrisk <mtk-manpages@gmx.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Davide Libenzi <davidel@xmailserver.org>
Cc: Michael Kerrisk <mtk-manpages@gmx.net>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Cc: Michael Kerrisk <mtk.manpages@gmail.com>
Cc: Davide Libenzi <davidel@xmailserver.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      4d672e7a
  49. 02 2月, 2008 1 次提交
  51. 21 11月, 2007 4 次提交
  53. 27 1月, 2008 2 次提交
  55. 21 12月, 2007 1 次提交