- 08 4月, 2017 21 次提交
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由 Archit Taneja 提交于
Use the mdp5_hw_mixer struct in the mdp5_crtc and mdp5_ctl instead of using the LM index. Like before, the Layer Mixers are assigned statically to the CRTCs. The hwmixer(s) will later be dynamically assigned to CRTCs. For now, ignore the hwmixers that can only do WB. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
Create a struct to represent MDP5 Layer Mixer instances. This will eventually allow us to detach CRTCs from the Layer Mixers, and generally clean things up a bit. This is very similar to how hwpipes were previously abstracted away from drm planes. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
The number of Layer Mixers and the downstream blocks (DSPPs and PPs) connected to each LM can vary with different MDP5 revisions. These parameters are also static. Keep the per instance LM data in mdp5_cfg. This will avoid the need to have macros which identify PP id or DSPP id the LM is connected to. We don't configure DSPPs at the moment, but keeping the DSPP instance # here might come handy later. Also add a 'caps' field that identifies features supported by a LM instance. Introduce the caps MDP_LM_CAP_DISPLAY and MDP_LM_CAP_WB that identify whether a LM instance can be used for display or writeback. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
We'd previously moved the pipe_lock spinlock to the hwpipe struct. Bring it back to mdp5_plane. We will need this because an mdp5_plane in the future could comprise of 2 hw pipes. It makes more sense to have a single lock to protect the registers for the hw pipes used by a plane, rather than trying to take individual locks per hwpipe when committing a configuration. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Vinay Simha BN 提交于
4 macros already defined in hdmi.h, which is not required to redefine in hdmi_audio.c Signed-off-by: NVinay Simha BN <simhavcs@gmail.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
'SSPP_MAX + 1' is the max number of hwpipes that can be present on a MDP5 platform. Recently, 2 new cursor hwpipes were added, which caused overflows in arrays that used SSPP_MAX to represent the number of elements. Update the SSPP_MAX value to incorporate the extra hwpipes. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
A recent commit introduces a bug in dsi_mgr_phy_enable. In the non dual DSI mode, we reset the mdsi (master DSI) PHY. This isn't right since master and slave DSI exist only in dual DSI mode. For the normal mode of operation, we should simply reset the PHY of the DSI device (i.e. msm_dsi) corresponding to the current bridge. Usage of the wrong DSI pointer also resulted in a static checker warning. That too is resolved with this fix. Fixes: b62aa70a (drm/msm/dsi: Move PHY operations out of host) Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Reviewed-by: NRob Clark <robdclark@gmail.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Jordan Crouse 提交于
Zero sized buffer objects tend to make various bits of the GEM infrastructure complain: WARNING: CPU: 1 PID: 2323 at drivers/gpu/drm/drm_mm.c:389 drm_mm_insert_node_generic+0x258/0x2f0 Modules linked in: CPU: 1 PID: 2323 Comm: drm-api-test Tainted: G W 4.9.0-rc4-00906-g693af44 #213 Hardware name: Qualcomm Technologies, Inc. DB820c (DT) task: ffff8000d7353400 task.stack: ffff8000d7720000 PC is at drm_mm_insert_node_generic+0x258/0x2f0 LR is at drm_vma_offset_add+0x4c/0x70 Zero sized buffers serve no appreciable value to the user so disallow them at create time. Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Jordan Crouse 提交于
Output the upper 32 bits of a 64 bit iova in the RD_CMDSTREAM_ADDR section while maintaining backwards compatibility for tools that only understand 32 bit iovas. Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Jordan Crouse 提交于
The interrupt status was being cleared before processing the handlers. a5xx_rbbm_err_irq() was checking the interrupt status again, which would likely turn out bad because the interrupt status would be 0 (or at least different). Pass the original status to the function instead. Also, skip clearing RBBM_AHB_ERROR from the interrupt status. The interrupt will keep firing until the error source is cleared. Skip the clear to avoid a storm until the error is cleared in a5xx_rbbm_err_irq(). Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Jordan Crouse 提交于
priv->num_aspaces is increased and then checked to see if it still fits in the priv->aspace array. If it doesn't, we warn and exit but priv->num_aspaces remains incremented. Don't incremement the count until we know that it fits in the array. Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Jordan Crouse 提交于
Instead of checking for a5xx_gpu->gpmu_iova during destroy we accidently check a5xx_gpu->gpmu_bo. Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Daniel Vetter 提交于
The core takes care of handling the send_event vs. close() issues, we can remove that driver code. Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Daniel Vetter 提交于
I didn't spot anything that would require ordering here (well not anywhere else either), and I'm trying to unify at least modern drivers on one close hook. Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Arnd Bergmann 提交于
The newly added a5xx support fails to build when debugfs is diabled: drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has no member named 'show' drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared here (not in a function); did you mean 'a5xx_irq'? This adds a missing #ifdef. Fixes: b5f103ab ("drm/msm: gpu: Add A5XX target support") Cc: stable@vger.kernel.org Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Probably a symptom of needing finer grained locking, but if we wait on the incoming fence-fd (which could come from a different context) while holding struct_mutex, that blocks retire_worker so gpu fences cannot get signalled. This causes a problem if userspace manages to get more than a frame ahead, leaving the atomic-commit worker blocked waiting on fences that cannot be signaled because submit is blocked waiting for a fence signalled from vblank (after the atomic commit which is blocked). If we start having multiple fence ctxs for the gpu, submit_fence_sync() would probably need to move outside of struct_mutex as well. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
In particular, attach() and unmap() need pm-runtime get/put to ensure iommu clks are enabled. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Significantly simplifies things. Also iommu_unmap() can unmap an entire iova range. (If backporting to downstream kernel you might need to revert this. Or at least double check older iommu implementation.) Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
We need to do this also in resume path when we need to re-hw_init(). Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
We need to use pm-runtime properly when IOMMU is using device_link() to control it's own clocks. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Each of the per-generation callbacks was doing this. Lets just simplify and move it into toplevel show() fxn. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 29 3月, 2017 1 次提交
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由 Daniel Vetter 提交于
Just rolling it out, no code change here. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Rob Clark <robdclark@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-3-daniel.vetter@ffwll.ch
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- 20 3月, 2017 1 次提交
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由 Arnd Bergmann 提交于
We now call those two functions even when they are not defined or declared anywhere because DEBUG_FS is disabled: drivers/gpu/drm/msm/msm_drv.c: In function 'msm_drm_uninit': drivers/gpu/drm/msm/msm_drv.c:244:2: error: implicit declaration of function 'msm_perf_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] drivers/gpu/drm/msm/msm_drv.c:245:2: error: implicit declaration of function 'msm_rd_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] This adds empty stub implementations for that case. Fixes: 85eac470 ("drm/msm: Remove msm_debugfs_cleanup()") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170320093936.1255573-1-arnd@arndb.de
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- 08 3月, 2017 1 次提交
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由 Noralf Trønnes 提交于
Move the contents of msm_debugfs_cleanup() to msm_drm_uninit() to free up the drm_driver->debugfs_cleanup callback. Also remove the mdp_kms_funcs->debugfs_cleanup callback which has no users. Cc: robdclark@gmail.com Signed-off-by: NNoralf Trønnes <noralf@tronnes.org> Acked-by: NRob Clark <robdclark@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170307204924.1002-2-noralf@tronnes.org
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- 01 3月, 2017 2 次提交
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由 Noralf Trønnes 提交于
drm_debugfs_cleanup() now removes all minor->debugfs_list entries automatically, so it's not necessary to call drm_debugfs_remove_files(). Additionally it uses debugfs_remove_recursive() to clean up the debugfs files, so no need to do that. Cc: robdclark@gmail.com Signed-off-by: NNoralf Trønnes <noralf@tronnes.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170126225621.12314-10-noralf@tronnes.org
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由 Joe Perches 提交于
Use a more common logging style. Miscellanea: o Coalesce formats and realign arguments o Neaten a few macros now using pr_<level> Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NRob Clark <robdclark@gmail.com> Acked-by: NSinclair Yeh <syeh@vmware.com> Acked-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com> Acked-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/76355db47b31668bb64d996865ceee53bd66b11f.1488285953.git.joe@perches.com
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- 25 2月, 2017 1 次提交
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由 Dave Jiang 提交于
->fault(), ->page_mkwrite(), and ->pfn_mkwrite() calls do not need to take a vma and vmf parameter when the vma already resides in vmf. Remove the vma parameter to simplify things. [arnd@arndb.de: fix ARM build] Link: http://lkml.kernel.org/r/20170125223558.1451224-1-arnd@arndb.de Link: http://lkml.kernel.org/r/148521301778.19116.10840599906674778980.stgit@djiang5-desk3.ch.intel.comSigned-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NRoss Zwisler <ross.zwisler@linux.intel.com> Cc: Theodore Ts'o <tytso@mit.edu> Cc: Darrick J. Wong <darrick.wong@oracle.com> Cc: Matthew Wilcox <mawilcox@microsoft.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 17 2月, 2017 1 次提交
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由 Laurent Pinchart 提交于
The field contains a pointer to the parent platform device of the DRM device. As struct drm_device also contains a dev pointer to the struct device embedded in the platform_device structure, the platformdev field is redundant. Remove it and use the dev pointer directly. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Acked-by: NJyri Sarha <jsarha@ti.com> Acked-by: Vincent Abriou <vincent.abriou@st.com> # For sti Acked-by: Russell King <rmk+kernel@armlinux.org.uk> # For armada Acked-by: Rob Clark <robdclark@gmail.com> # For msm Acked-by: Xinwei Kong<kong.kongxinwei@hisilicon.com>
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- 15 2月, 2017 1 次提交
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由 Wei Yongjun 提交于
Fix to return error code -ENOMEM from the malloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170209151907.28800-1-weiyj.lk@gmail.com
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- 08 2月, 2017 2 次提交
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由 Shawn Guo 提交于
Core code already makes drm_driver.get_vblank_counter hook optional by letting drm_vblank_no_hw_counter be the default implementation for the function hook. So the drm_vblank_no_hw_counter assignment in the driver code becomes redundant and can be removed now. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Xinliang Liu <z.liuxinliang@hisilicon.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: CK Hu <ck.hu@mediatek.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Eric Anholt <eric@anholt.net> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NAlexey Brodkin <abrodkin@synopsys.com> Acked-by: NLiviu Dudau <liviu.dudau@arm.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-3-git-send-email-shawnguo@kernel.org
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由 Daniel Vetter 提交于
Noticed that everyone duplicates the same logic here and we could safe a few lines per driver. Yay for lots of drivers to make such tiny refactors worth-while! v2: Forgot to git add everything :( v3: Actually remove release_fbi (Sean, Emil, Chris) ... Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Sean Paul <seanpaul@chromium.org> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170207161603.17611-1-daniel.vetter@ffwll.ch
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- 07 2月, 2017 9 次提交
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由 Dan Carpenter 提交于
copy_from_user_inatomic() is actually a local function that returns -EFAULT or positive values on error. Otherwise copy_from_user() returns the number of bytes remaining to be copied. We want to return -EFAULT here. I removed an unlikely() because we just did a copy_from_user() so I don't think it can possibly make a difference. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL found on 8x96. These are picked up from the downstream driver. The PHY part is similar to the other DSI PHYs. The PLL driver requires some trickery so that one DSI PLL can drive both the DSIs (i.e, dual DSI mode). In the case of dual DSI mode. One DSI instance becomes the clock master, and other the clock slave. The master PLL's output (Byte and Pixel clock) is fed to both the DSI hosts/PHYs. When the DSIs are configured in dual DSI mode, the PHY driver communicates to the PLL driver using msm_dsi_pll_set_usecase() which instance is the master and which one is the slave. When setting rate, the master PLL also configures some of the slave PLL/PHY registers which need to be identical to the master's for correct dual DSI behaviour. There are 2 PLL post dividers that should have ideally been modelled as generic clk_divider clocks, but require some customization for dual DSI. In particular, when the master PLL's post-diviers are set, the slave PLL's post-dividers need to be set too. The clk_ops for these use clk_divider's helper ops and flags internally to prevent redundant code. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Hai Li 提交于
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different set of calculations for computing D-PHY timing params. Create a timing_calc_v2 func for the newer v2 PHYs. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Hai Li 提交于
Since DSI PHY has been a separate platform device, it should not depend on the resources in host to be functional. This change is to trigger PHY operations in manager, instead of host, so that host and PHY can be completely separated. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
In case of dual DSI, some registers in PHY1 have been programmed during PLL0 clock's set_rate. The PHY1 reset called by host1 later will silently reset those PHY1 registers. This change is to reset and enable both PHYs before any PLL clock operation. [Originally worked on by Hai Li <hali@codeaurora.org>. Fixed up by Archit Taneja <architt@codeaurora.org>] Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Hai Li 提交于
For some new types of DSI PHY, more settings depend on use cases controlled by DSI manager. This change allows DSI manager to setup PHY with a use case. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Hai Li 提交于
The DSI host is required to configure more timings calculated in PHY. By introducing a shared structure, this change allows more timing information passed from PHY to host. Signed-off-by: NHai Li <hali@codeaurora.org> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
Create an init() op for dsi_phy which sets up things specific to a given DSI PHY. The dsi_phy driver probe expects every DSI version to get a "dsi_phy_regulator" mmio base. This isn't the case for 8x96. Creating an init() op will allow us to accommodate such differences. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Archit Taneja 提交于
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver enables core_mmss_clk. We're seeing some branch clock warnings on 8x96 when enabling this. There doesn't seem to be any negative effect with not enabling this clock, so use it once we figure out why we get the warnings. Signed-off-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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