1. 18 7月, 2014 1 次提交
  2. 16 5月, 2014 2 次提交
  3. 11 5月, 2014 1 次提交
  4. 30 4月, 2014 1 次提交
  5. 14 4月, 2014 2 次提交
  6. 08 3月, 2014 1 次提交
    • P
      ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi · e05c8c9a
      Philipp Zabel 提交于
      This patch connects IPU and display encoder (VGA, LVDS)
      device tree nodes, as well as parallel displays on the DISP0
      and DISP1 outputs, using the OF graph bindings described in
      Documentation/devicetree/bindings/media/video-interfaces.txt
      
      The IPU ports correspond to the two display interfaces. The
      order of endpoints in the ports is arbitrary.
      
      Since the imx-drm node now only needs to contain links to the
      display interfaces, it can be moved to the SoC dtsi level. At
      the board level, only connections between the display interface
      ports and encoders or panels have to be added.
      Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e05c8c9a
  7. 09 2月, 2014 6 次提交
  8. 07 2月, 2014 1 次提交
  9. 13 1月, 2014 1 次提交
  10. 16 12月, 2013 1 次提交
  11. 22 8月, 2013 8 次提交
  12. 15 7月, 2013 1 次提交
    • P
      ARM i.MX53: Fix UART pad configuration · f5786b8e
      Philipp Zabel 提交于
      The current default pad configuration for UART RX and TX pads sets a 360k
      pull-down and writes 1 to a reserved bit (1 << 0). It doesn't seem right to
      me that in idle state, the UART has to keep the signal high against a
      pull-down resistor.
      
      This patch instead sets a 100k pull-up, which incidentally corresponds to the
      register reset value for all but one (MX53_PAD_KEY_ROW0__UART4_RXD_MUX) pad,
      and removes the write to the reserved bit.
      Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      f5786b8e
  13. 17 6月, 2013 14 次提交