- 27 4月, 2007 3 次提交
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由 Thomas Bogendoerfer 提交于
PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Atsushi Nemoto 提交于
* Kill dead codes * Rearrange irq chip handlers * Minimize defconfig Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Yoichi Yuasa 提交于
This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 30 3月, 2007 1 次提交
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由 Ralf Baechle 提交于
arch/mips/pci/pci-ev64120.c:10: warning: implicit declaration of function 'allocate_irqno' Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 25 3月, 2007 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 05 3月, 2007 3 次提交
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由 Florian Fainelli 提交于
This patch clears PCI errors after showing more debug informations. Signed-off-by: NFlorian Fainelli <florian.fainelli@int-evry.fr> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Atsushi Nemoto 提交于
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 27 2月, 2007 1 次提交
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由 Atsushi Nemoto 提交于
pcibios_fixup_device_resources() is called by pcibios_fixup_bus() which is marked as __devinit. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 19 2月, 2007 2 次提交
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由 Thomas Bogendoerfer 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
This implementation has support for the concept of one separate ioport address space by PCI domain. A pointer to the virtual address where the port space of a domain has been mapped has been added to struct pci_controller and systems should be fixed to fill in this value. For single domain systems this will be the same value as passed to set_io_port_base(). Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 2月, 2007 1 次提交
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由 Ralf Baechle 提交于
Platforms will now have to supply a function dma_device_is_coherent which returns if a particular device participates in the coherence domain. For most platforms this function will always return 0 or 1. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 07 2月, 2007 2 次提交
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由 Ahmed S. Darwish 提交于
Signed-off-by: NAhmed S. Darwish <darwish.07@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Atsushi Nemoto 提交于
Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and make it really customizable. And remove I8259_IRQ_BASE declared on some platforms. Currently only NEC_CMBVR4133 is using custom I8259A_IRQ_BASE value. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 09 1月, 2007 1 次提交
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由 Davy Chan 提交于
There's a serious typo in the function: arch/mips/pci/ops-pnx8550.c:write_config_byte() The parameter passed to the function config_access() is PCI_CMD_CONFIG_READ instead of PCI_CMD_CONFIG_WRITE. This renders any attempts to write a single byte to the PCI configuration registers useless. This problem does not exist for write_config_word() nor write_config_dword(). This problem has been there since kernel v2.6.17 and is still there as of kernel v2.6.19.1. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 09 12月, 2006 2 次提交
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由 Vitaly Wool 提交于
Signed-off-by: NVitaly Wool <vitalywool@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Thomas Bogendoerfer 提交于
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 30 11月, 2006 1 次提交
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由 Yoichi Yuasa 提交于
This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 07 11月, 2006 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 08 10月, 2006 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 04 10月, 2006 3 次提交
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由 Uwe Zeisberger 提交于
Many files include the filename at the beginning, serveral used a wrong one. Signed-off-by: NUwe Zeisberger <Uwe_Zeisberger@digi.com> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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由 Yoichi Yuasa 提交于
As per feature-removal-schedule.txt. Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Acked-by: NAlan Cox <alan@redhat.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Maciej W. Rozycki 提交于
It was obesrved that at least one older PCI card predating the requirement for the TRDY signal to respond within 16 clock ticks actually does not meet this rule nor even the power-on defaults of the PCI bridges found in development systems built around the Broadcom SiByte SOCs. Here is a patch that bumps up the timeout to the highest finite value supported by these chips, which is 255 clock ticks. The bridges affected are the SiByte SOC itself and the SP1011. This change does not effectively affect systems only having PCI option cards installed that meet the TRDY requirement of the current PCI spec. The rule was introduced with PCI 2.1, so any older card may make the system affected. If this is the case, performance of the system will suffer in return for the card working at all. If this is a concern, then the solution is not to use such cards. Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org> ---
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- 27 9月, 2006 5 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Maciej W. Rozycki 提交于
The following change updates the Atlas interrupt handling to match that of Malta. Tested with a 5Kc and a 34Kf successfully. Signed-off-by: NMaciej W. Rozycki <macro@mips.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alexander Bigga 提交于
I've encountered a serious problem with PCI config space access on Au1x000 platforms with recent 2.6.x-kernel. With 2.4.31 the same hardware works fine. So I was looking for the differences: Symptoms: - no PCI-device is seen on bootup though two or three cards are present - lspci output is empty - OR: lspci shows 20 times the same device (- OR: in some slot-configurations it worked anyhow) System(s): 1. platform with Au1500 and three PCI-devices (actually a mycable XXS1500 with backplane for three PCI-devices) 2. platform with Au1550 and two PCI-devices (custom board) Debugging: I digged down to the config_access() of the au1xxx-processors in arch/mips/pci/ops-au1000.c and switched on DEBUG. The code of config_access() seems to be almost the same as of the 2.4.x-kernel. But the "pci_cfg_vm->addr" returned by get_vm_area(0x2000, 0) once on booting is different. That's of course not forbidden. But the alignment seems to be wrong. In my case, I received: 2.4.31: pci_cfg_vm->addr = c0000000 2.6.18-rc5: pci_cfg_vm->addr = c0101000 To make it short: With 2.6.x it fails on the first config-access with: "PCI ERR detected: status 83a00356". Fixup: My fix is now, to use the VM_IOREMAP-flag in the get_vm_area call. This flag seems to be introduced in mm/vmalloc.c a long time ago (in 2.6.7-bk13, I found in gitweb). Now, the returned address is pci_cfg_vm->addr = c0104000 and everything works fine. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Yoichi Yuasa 提交于
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 7月, 2006 2 次提交
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由 Yoichi Yuasa 提交于
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 30 6月, 2006 2 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 28 6月, 2006 1 次提交
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由 Greg Kroah-Hartman 提交于
Based on a patch series originally from Vivek Goyal <vgoyal@in.ibm.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 20 6月, 2006 6 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NThomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 dmitry pervushin 提交于
Signed-off-by: Ndmitry pervushin <dpervushin@ru.mvista.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Thomas Bogendoerfer 提交于
Added support for RM200C machines with big endian firmware Added support for RM200-C40 (R5000 support) Signed-off-by: NFlorian Lohoff <flo@rfc822.org> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
As warned several times before. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
As warned several times before. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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