1. 30 9月, 2015 1 次提交
  2. 14 9月, 2015 2 次提交
  3. 04 9月, 2015 1 次提交
  4. 14 8月, 2015 2 次提交
  5. 05 8月, 2015 1 次提交
  6. 15 7月, 2015 1 次提交
  7. 06 7月, 2015 1 次提交
  8. 03 7月, 2015 1 次提交
    • J
      drm/i915: Reserve space improvements · 79bbcc29
      John Harrison 提交于
      An earlier patch was added to reserve space in the ring buffer for the
      commands issued during 'add_request()'. The initial version was
      pessimistic in the way it handled buffer wrapping and would cause
      premature wraps and thus waste ring space.
      
      This patch updates the code to better handle the wrap case. It no
      longer enforces that the space being asked for and the reserved space
      are a single contiguous block. Instead, it allows the reserve to be on
      the far end of a wrap operation. It still guarantees that the space is
      available so when the wrap occurs, no wait will happen. Thus the wrap
      cannot fail which is the whole point of the exercise.
      
      Also fixed a merge failure with some comments from the original patch.
      
      v2: Incorporated suggestion by David Gordon to move the wrap code
      inside the prepare function and thus allow a single combined
      wait_for_space() call rather than doing one before the wrap and
      another after. This also makes the prepare code much simpler and
      easier to follow.
      
      v3: Fix for 'effective_size' vs 'size' during ring buffer remainder
      calculations (spotted by Tomas Elf).
      
      For: VIZ-5115
      CC: Daniel Vetter <daniel@ffwll.ch>
      Signed-off-by: NJohn Harrison <John.C.Harrison@Intel.com>
      Reviewed-by: NTomas Elf <tomas.elf@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      79bbcc29
  9. 23 6月, 2015 20 次提交
  10. 04 6月, 2015 1 次提交
  11. 03 6月, 2015 3 次提交
  12. 22 5月, 2015 1 次提交
  13. 21 5月, 2015 3 次提交
    • C
      drm/i915: Implement inter-engine read-read optimisations · b4716185
      Chris Wilson 提交于
      Currently, we only track the last request globally across all engines.
      This prevents us from issuing concurrent read requests on e.g. the RCS
      and BCS engines (or more likely the render and media engines). Without
      semaphores, we incur costly stalls as we synchronise between rings -
      greatly impacting the current performance of Broadwell versus Haswell in
      certain workloads (like video decode). With the introduction of
      reference counted requests, it is much easier to track the last request
      per ring, as well as the last global write request so that we can
      optimise inter-engine read read requests (as well as better optimise
      certain CPU waits).
      
      v2: Fix inverted readonly condition for nonblocking waits.
      v3: Handle non-continguous engine array after waits
      v4: Rebase, tidy, rewrite ring list debugging
      v5: Use obj->active as a bitfield, it looks cool
      v6: Micro-optimise, mostly involving moving code around
      v7: Fix retire-requests-upto for execlists (and multiple rq->ringbuf)
      v8: Rebase
      v9: Refactor i915_gem_object_sync() to allow the compiler to better
      optimise it.
      
      Benchmark: igt/gem_read_read_speed
      hsw:gt3e (with semaphores):
      Before: Time to read-read 1024k:		275.794µs
      After:  Time to read-read 1024k:		123.260µs
      
      hsw:gt3e (w/o semaphores):
      Before: Time to read-read 1024k:		230.433µs
      After:  Time to read-read 1024k:		124.593µs
      
      bdw-u (w/o semaphores):             Before          After
      Time to read-read 1x1:            26.274µs       10.350µs
      Time to read-read 128x128:        40.097µs       21.366µs
      Time to read-read 256x256:        77.087µs       42.608µs
      Time to read-read 512x512:       281.999µs      181.155µs
      Time to read-read 1024x1024:    1196.141µs     1118.223µs
      Time to read-read 2048x2048:    5639.072µs     5225.837µs
      Time to read-read 4096x4096:   22401.662µs    21137.067µs
      Time to read-read 8192x8192:   89617.735µs    85637.681µs
      
      Testcase: igt/gem_concurrent_blit (read-read and friends)
      Cc: Lionel Landwerlin <lionel.g.landwerlin@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> [v8]
      [danvet: s/\<rq\>/req/g]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b4716185
    • I
      drm/i915/skl: enable WaForceContextSaveRestoreNonCoherent · 8ea6f892
      Imre Deak 提交于
      v2:
      - set the override disable flag too on stepping F0 (mika)
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      8ea6f892
    • I
      drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+ · 2a0ee94f
      Imre Deak 提交于
      On B0 and C0 steppings the workaround enable bit would be overriden by
      default, so the overriding must be disabled.
      
      The WA was added in
      commit 83a24979
      Author: Nick Hoath <nicholas.hoath@intel.com>
      Date:   Fri Apr 10 13:12:26 2015 +0100
      
          drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent
      Spotted-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2a0ee94f
  14. 20 5月, 2015 1 次提交
  15. 08 5月, 2015 1 次提交