o Move all files from sparc64/kernel/ to sparc/kernel
  - rename as appropriate
o Update sparc/Makefile to the changes
o Update sparc/kernel/Makefile to include the sparc64 files

NOTE: This commit changes link order on sparc64!

Link order had to change for either of sparc32 and sparc64.
And assuming sparc64 see more testing than sparc32 change link
order on sparc64 where issues will be caught faster.
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch makes the following needlessly global code static:
- central.c: struct central_bus
- central.c: struct fhc_list
- central.c: apply_fhc_ranges()
- central.c: apply_central_ranges()
- ds.c: struct ds_states_template[]
- pci_msi.c: sparc64_setup_msi_irq()
- pci_msi.c: sparc64_teardown_msi_irq()
- pci_sun4v.c: struct sun4v_dma_ops
- sys_sparc32.c: cp_compat_stat64()
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Record and propagate NUMA information for devices.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Invoke the desc->handle_irq directly in the top-level dispatch,
just like other sophisticated ports.

This will allow us to decrease the cost of the MSI queue dispatch.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We used to need this to compute virt_irq --> ino, but that
is no longer necessary.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We have a place to stick INO information in the
virt_to_real_irq_table[], which is currently only used for VIRQs.
And that is readily accessible from the one __irq_ino() call site.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This also makes us use the MSI queues correctly.

Each MSI queue is serviced by a normal sun4u/sun4v INO interrupt
handler.  This handler runs the MSI queue and dispatches the
virtual interrupts indicated by arriving MSIs in that MSI queue.

All of the common logic is placed in pci_msi.c, with callbacks to
handle the PCI controller specific aspects of the operations.

This common infrastructure will make it much easier to add MSG
support.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>