- 12 6月, 2015 11 次提交
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由 Nicholas Mc Guire 提交于
wait_for_completion_timeout returns 0 in case of timeout so printing the return value here will always yield 0 and is therefor redundant - dropped. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Nicholas Mc Guire 提交于
The timeout is passed as a constant which makes it HZ dependent because jiffies are expected so it should be converted to jiffies. The actual value is not clear from the code - my best guess is that this should be 300 milliseconds given that other timeouts are in milliseconds based on looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms, tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who knows the details of the driver. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Nicholas Mc Guire 提交于
wait_for_completion_timeout return >= 0 but never negative so the check logic looks inconsistent. Further the return value of wait_for_completion_timeout was being passed up the call chain but the x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0 thus timeout was being treated as success case. <snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg() mutex_lock(&aux->hw_mutex); ret = aux->transfer(aux, msg); mutex_unlock(&aux->hw_mutex); if (ret < 0) { <snip> logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout) but checks of <= 0 to indicate error so the return probably should be -ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout occurred). Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Seems like disable can race with complete_flip() in process of disabling a crtc, leading to: [ 49.065364] Call trace: [ 49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0 [ 49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8 [ 49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220 [ 49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38 [ 49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8 [ 49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398 [ 49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70 [ 49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0 [ 49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8 [ 49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128 [ 49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100 [ 49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0 [ 49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0 [ 49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0 It makes no sense to free the ctl without disabling all stages, so lets just move them together to avoid the crash. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
As found in apq8016 (used in DragonBoard 410c) and msm8916. Note that numerically a306 is actually 307 (since a305c already claimed 306). Nice and confusing. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
A few spots in the driver have support for downstream android CONFIG_MSM_BUS_SCALING. This is mainly to simplify backporting the driver for various devices which do not have sufficient upstream kernel support. But the intentionally dead code seems to cause some confusion. Rename the #define to make this more clear. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Using fb modifier flag, support NV12MT format in MDP4. v2: - rework the modifier's description [Daniel Vetter's comment] - drop .set_mode_config() callback [Rob Clark's comment] v3: - change VENDOR's name and restrict usage to NV12 [pointed by Daniel] Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Somehow this got lost when msm atomic support was first merged. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Dump a bit more info when the GPU hangs, without having hang_debug enabled (which dumps a *lot* of registers). Also dump the scratch registers, as they are useful for determining where in the cmdstream the GPU hung (and they seem always safe to read when GPU has hung). Note that the freedreno gallium driver emits increasing counter values to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so these two in particular can be used to "triangulate" where in the cmdstream the GPU hung. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 11 6月, 2015 6 次提交
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由 Dan Carpenter 提交于
The goto is correct, and we never reach the return statement so just delete the dead code. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dan Carpenter 提交于
virtio_gpu_alloc_object() returns an error pointer, it never returns NULL. Fixes: dc5698e8 ('Add virtio gpu driver.') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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git://people.freedesktop.org/~agd5f/linux由 Dave Airlie 提交于
More fixes for amdgpu for 4.2. We've integrated Jerome's comments about the interface among other things. I'll be on vacation next week so Christian will be handling any updates next week. * 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (23 commits) drm/amdgpu: fix a amdgpu_dpm=0 bug drm/amdgpu: don't enable/disable display twice on suspend/resume drm/amdgpu: fix UVD/VCE VM emulation drm/amdgpu: enable vce powergating drm/amdgpu/iceland: don't call smu_init on resume drm/amdgpu/tonga: don't call smu_init on resume drm/amdgpu/cz: don't call smu_init on resume drm/amdgpu: update to latest gfx8 golden register settings drm/amdgpu: whitespace cleanup in gmc8 golden regs drm/admgpu: move XDMA golden registers to dce code drm/amdgpu: fix the build on big endian drm/amdgpu: cleanup UAPI comments drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING drm/amdgpu: remove the VI hardware semaphore in ring sync drm/amdgpu: set the gfx config properly for all CZ variants (v2) drm/amdgpu: also print the pci revision when printing the pci ids drm/amdgpu: cleanup VA IOCTL drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap drm/amdgpu: fix amdgpu_vm_bo_map drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS ...
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由 Sonny Jiang 提交于
Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
We were doing it in the common code and in the IP specific code. Remove the IP specific code. The common code handles the ordering properly. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 6月, 2015 11 次提交
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由 Sonny Jiang 提交于
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on demand. Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Alex Deucher 提交于
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: NSonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: NSonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: NSonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Already moved other display registers. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Some leftover copy and pastes from radeon that never got updated. Reviewed-by: NChristian König <christian.koenig@amd.com> Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
No functional change. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Not used. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Zhang 提交于
Signed-off-by: NDavid Zhang <david1.zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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- 09 6月, 2015 5 次提交
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由 Alex Deucher 提交于
Need to adjust the number of CUs and RBs. v2: get proper values Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
The driver makes use of this information so print if to aid in debugging. Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Remove the unnecessary returned status and make the IOCTL write only. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We need to reset the bo_va address, otherwise new mappings wouldn't be updated in the page table. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 6月, 2015 7 次提交
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由 Jammy Zhou 提交于
Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chunming Zhou 提交于
amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: Nmonk liu <monk.liu@amd.com>
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由 Jack Xiao 提交于
Signed-off-by: NJack Xiao <Jack.Xiao@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
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git://people.freedesktop.org/~agd5f/linux由 Dave Airlie 提交于
This is the big pull request for amdgpu, the new driver for VI+ AMD asics. I currently supports Tonga, Iceland, and Carrizo and also contains a Kconfig option to build support for CI parts for testing. All major functionality is supported (displays, gfx, compute, dma, video decode/encode, etc.). Power management is working on Carrizo, but is still being worked on for Tonga and Iceland. * 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (106 commits) drm/amdgpu: only support IBs in the buffer list (v2) drm/amdgpu: add vram_type and vram_bit_width for interface query (v2) drm/amdgpu: add ib_size/start_alignment interface query drm/amdgpu: add me/ce/pfp_feature_version interface query drm/amdgpu add ce_ram_size for interface query drm/amdgpu add max_memory_clock for interface query (v2) drm/amdgpu: add hdp flush for gfx8 compute ring drm/amdgpu: fix no hdp flush for compute ring drm/amdgpu: add HEVC/H.265 UVD support drm/amdgpu: stop loading firmware with pm.mutex locked drm/amdgpu: remove mclk_lock drm/amdgpu: fix description of vm_size module parameter (v2) drm/amdgpu: remove all sh mem register modification in vm flush drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT drm/amdgpu: fence should be added to shared slot drm/amdgpu: sync fence of clear_invalids (v2) drm/amdgpu: max_pde_used usage should be under protect drm/amdgpu: fix bug of vm_bo_map (v2) drm/amdgpu: implement the allocation range (v3) drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) ...
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由 Frediano Ziglio 提交于
This function could return a NULL pointer in case of handle not present and in case of out of memory conditions however caller function always returned EINVAL error hiding a possible ENOMEM. This patch change the function to return the error instead to be able to propagate the error instead of assuming EINVAL. Signed-off-by: NFrediano Ziglio <fziglio@redhat.com> Reviewed-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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