The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: NThierry Reding <treding@nvidia.com>

Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra210, these trips can trigger shut down or reset.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Adds soctherm node for Tegra210, and add cpu,
gpu, mem, pllx as thermal-zones. Set critical
trip temperatures for them.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra132, these trips can trigger shut down or reset.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

The Tegra132 has the specific settings for soctherm,
so change to use campatible "nvidia,tegra132-soctherm" for it.
And adds cpu, gpu, mem and pllx thermal zones.
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Enable the XUSB controller on Tegra210 Smaug. The Smaug has a USB Type-C
connector with one of the USB2.0 lanes and one of the USB3.0 lanes
populated.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Tegra210 Smaug includes the Realtek RT5677 audio codec, Nuvoton
NAU8825 headset codec and the Maxim MAX98357a audio amplifier. Add
the nodes for these devices for the Tegra210 Smaug.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: use interrupts property consistently]
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Tegra210 Smaug uses I2C6 for interfacing to various audio chips.
I2C6 shares pads with the DPAUX interface and to allow I2C6 to request
the pads owned by DPAUX, the DPAUX device needs to be enabled. Enable
DPAUX for Tegra210 Smaug.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Populate the ACONNECT, ADMA and AGIC nodes for Tegra210 Smaug which
are used for audio use-cases.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add node for SOR power-domain for Tegra210 and populate the SOR
power-domain phandle for DPAUX, DSI, MIPI-CAL and SOR and nodes that are
dependent on this power-domain.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Populate the ADMA node for Tegra210. The ADMA is used by the Audio
Processing Engine (APE) on Tegra210 for moving data between the APE
and system memory.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Populate the Audio GIC (AGIC) node for Tegra210. This interrupt
controller is used by the Audio Processing Engine to route interrupts
to the main CPU interrupt controller. The AGIC is based on the ARM
GIC400 and so uses the clock name "clk" as specified by the GIC binding
document for GIC400 devices.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Drop the clock and reset names for the Tegra210 XUSB powergates because
these are not currently used and not required by the Tegra PMC binding
documentation.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The compatible value need only include an entry for the specific HW
generation, plus the oldest HW version that introduced changes it is
backwards-compatible with; intermediate versions aren't necessary. Since
Tegra124 GPIO is backwards-compatible with Tegra30 GPIO, there's no need
to include the Tegra124 value in the Tegra210 DTS. This makes the kernel
DT better match the copy of the DT files included in U-Boot.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Signed-off-by: NThierry Reding <treding@nvidia.com>

The sor1 IP block needs the sor1_src clock to configure the clock tree
depending on whether it's running in HDMI or DP mode.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add the DPAUX pinctrl states for the DPAUX nodes defining all three
possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
node for the DPAUX nodes so that the I2C driver core does not attempt
to parse the pinctrl state nodes.

Populate the nodes for the pinctrl clients of the DPAUX pin controller.
There are two clients for each DPAUX instance, namely the SOR and one of
the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
or I2C modes and so for these devices we don't define any of the generic
pinctrl states (default, idle, etc) because the SOR driver will directly
set the state needed. For I2C clients only the I2C mode is used and so
we can simplify matters by using the generic pinctrl states for default
and idle.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add the ACONNECT bus node for Tegra210 which is used to interface to
the various devices in the Audio Processing Engine (APE).
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add the audio powergate for Tegra210.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add regulators to the Tegra210 Smaug DTS file including support for the
MAX77620 PMIC.
Signed-off-by: NRhyland Klein <rklein@nvidia.com>
Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for
the XUSB pad controller. For some Tegra210 boards, this is causing USB
connect and disconnect events to go undetected. Fix this by changing the
interrupt number for the XUSB mailbox to 40.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Enable the XUSB controller on Jetson TX1. One of the USB 3.0 lanes goes
to an internal ethernet interface, while a second USB 3.0 lane supports
the USB-A receptacle on the I/O board.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add a chosen node to the device tree that contains a stdout-path
property which defines the debug serial port.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add a device tree node for the XUSB pad controller found on Tegra210.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel
connected via four DSI lanes.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add power supplies for the SD/MMC card slot. Note that vmmc-supply is
currently restricted to 3.3 V because we don't support switching the
mode yet.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add a device tree node for the MAX77620 PMIC found on the p2180
processor module (Jetson TX1). Also add supporting power supplies,
such as the main 5 V system supply.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The operating system driver can take advantage of the IOMMU to remove
the need for physically contiguous memory buffers.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This clock is required for the GPU to operate.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add nodes for the ChromeOS Embedded Controller and for the gas gauge
connected to the I2C bus that it controls.
Signed-off-by: NRhyland Klein <rklein@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add pinmux node for Tegra210 Smaug board.
Signed-off-by: NRhyland Klein <rklein@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

For Tegra boards, the device-tree alias serial0 is used for the console
and so add the stdout-path information so that the console no longer
needs to be passed via the kernel boot parameters.

For tegra132-norrin the alias serial0 is not defined and so add this.

This has been tested on tegra132-norrin and tegra210-p2371-0000.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Remove the "#power-domain-cells" property which was incorrectly
included by commit e53095857166 ("arm64: tegra: Add Tegra210
support").
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add gpio-keys nodes for the volumn controls, lid switch, tablet mode and
power button.
Signed-off-by: NRhyland Klein <rklein@nvidia.com>
Reviewed-by: NAndrew Bresticker <abrestic@chromium.org>
[treding@nvidia.com: use symbolic names for input types and codes]
[treding@nvidia.com: use wakeup-source instead of gpio-key,wakeup]
Signed-off-by: NThierry Reding <treding@nvidia.com>