shiraz.hashim@st.com email-id doesn't exist anymore as he has left the
company.  Replace ST's id with shiraz.linux.kernel@gmail.com.

It also updates .mailmap file to fix address for 'git shortlog'.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

To be consistent with other Broadcom drivers, the Broadcom Capri pinctrl
driver and its related CONFIG option are renamed to bcm281xx.

This commit updates the defconfig that enables the pinctrl driver.
Signed-off-by: NSherman Yin <syin@broadcom.com>
Reviewed-by: NMatt Porter <mporter@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch adds asm macros for inc_preempt_count and dec_preempt_count_ti
(which also gets the current thread_info) instead of open-coding them in
arch/arm/vfp/*.S files.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NArun KS <getarunks@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

asm/assembler.h is a better place for this macro since it is used by
asm files outside arch/arm/kernel/
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NArun KS <getarunks@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus,
pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(PJ4 and no-PJ4)
can use code.
Signed-off-by: NChao Xie <chao.xie@marvell.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch add cpu_is_pj4 at arch/arm/include/asm/cputype.h
PJ4 has some differences with V7, for example the coprocessor.
To disinguish this kind of situation. cpu_is_pj4 is needed.
Signed-off-by: NChao Xie <chao.xie@marvell.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arm_pm_restart(), arm_pm_idle() and soft_restart() are all declared in
system_misc.h, but this file is not included in process.c.  Add this
missing include.  Found via sparse:

arch/arm/kernel/process.c:98:6: warning: symbol 'soft_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:127:6: warning: symbol 'arm_pm_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:134:6: warning: symbol 'arm_pm_idle' was not declared. Should it be static?
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If the renamed symbol is defined lib/iomap.c implements ioport_map and
ioport_unmap and currently (nearly) all platforms define the port
accessor functions outb/inb and friend unconditionally.  So
HAS_IOPORT_MAP is the better name for this.

Consequently NO_IOPORT is renamed to NO_IOPORT_MAP.

The motivation for this change is to reintroduce a symbol HAS_IOPORT
that signals if outb/int et al are available.  I will address that at
least one merge window later though to keep surprises to a minimum and
catch new introductions of (HAS|NO)_IOPORT.

The changes in this commit were done using:

	$ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/'
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Strictly speaking this call is a no-op on the platform where dcscb.c is
used since it only has architected caches.  The call was there as a hint
to people inspired by this code when writing their own backend, but the
hint might not always be correct.

For example, if a PL310 were to be used it wouldn't be safe to call
the regular outer_flush_all() as atomic instructions for locking
are involved in that case and those instructions cannot be assumed to
still be operational after v7_exit_coherency_flush() has returned.
Given no other CPUs (in the cluster) should be running at that point
then standard concurrency concerns wouldn't apply.

So let's simply kill this call for now and enhance the existing comment.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On non-LPAE ARMv6+, read-only PMD bits are defined with the combination
"PMD_SECT_APX | PMD_SECT_AP_WRITE". Adjusted the bit masks to correctly
report this.
Signed-off-by: NKees Cook <keescook@chromium.org>
Tested-by: NLaura Abbott <lauraa@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When we configure CONFIG_ARM_LPAE=y, pfn << PAGE_SHIFT will
overflow if pfn >= 0x100000 in copy_oldmem_page.
So use __pfn_to_phys for converting.
Signed-off-by: NLiu Hua <sdu.liu@huawei.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Use of tracers in local_irq_disable is causes abort loops when called
with irqs disabled using a temporary stack.  Replace local_irq_disable
with raw_local_irq_disable instead to avoid tracers.
Signed-off-by: NSebastian Capella <sebastian.capella@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch changes fimd node status to OK.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch changes fimd node status to OK.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds s6e8aa0 panel node for trats2.
It adds also trats2 specific properties for DSI
and regulator required by panel.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds s6e8aa0 panel node for trats.
It adds also trats specific properties for DSI.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

This is a common part of DSI node for all Exynos4 boards.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

This patch replaces panel bindings for panel initialized by boot loader
with bindings to proper ld9040 panel.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Remove pdata quirks for the displays on boards that are now supported
properly with DT.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>

Export the DMA register information from the SoC specific data, such
that we can access the registers directly in omap-dma.c, mapping the
register region ourselves as well.

Rather than calculating the DMA channel register in its entirety for
each access, we pre-calculate an offset base address for the allocated
DMA channel and then just use the appropriate register offset.
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The omap_system_dma_plat_info structure is only seven words, it's not
worth the expense of kmalloc()'ing backing store for this only to
release it later.  Note that platform_device_add_data() copies the
data anyway.  Clean up the initialisation of this structure - we don't
even need code to initialise most of this structure.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This really needs to be there, because otherwise the plat-omap code can
kfree() this data structure, and then re-use the pointer later.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

There's no need for this to be a global variable; move it into the
errata configuration function instead.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We can do much better with this by using a structure to describe each
register, rather than code.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

dma_stride and dma_common_ch_start are only ever initialised to one
known value at initialisation, and are private to each of these files.
There's no point these being variables at all.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The disable_irq_lch method is never actually used, so there's not much
point it existing; remove it.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Provide and use a hook to obtain the underlying DMA platform operations
so that omap-dma.c can access the hardware more directly without
involving the legacy DMA driver.
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Switch the device tree to the new compatibles introduced in the RTC
drivers to have a common pattern accross all Allwinner SoCs.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

virt_to_page() is incredibly inefficient when virt-to-phys patching is
enabled.  This is because we end up with this calculation:

  page = &mem_map[asm virt_to_phys(addr) >> 12 - __pv_phys_offset >> 12]

in assembly.  The asm virt_to_phys() is equivalent this this operation:

  addr - PAGE_OFFSET + __pv_phys_offset

and we can see that because this is assembly, the compiler has no chance
to optimise some of that away.  This should reduce down to:

  page = &mem_map[(addr - PAGE_OFFSET) >> 12]

for the common cases.  Permit the compiler to make this optimisation by
giving it more of the information it needs - do this by providing a
virt_to_pfn() macro.

Another issue which makes this more complex is that __pv_phys_offset is
a 64-bit type on all platforms.  This is needlessly wasteful - if we
store the physical offset as a PFN, we can save a lot of work having
to deal with 64-bit values, which sometimes ends up producing incredibly
horrid code:

     a4c:       e3009000        movw    r9, #0
                        a4c: R_ARM_MOVW_ABS_NC  __pv_phys_offset
     a50:       e3409000        movt    r9, #0          ; r9 = &__pv_phys_offset
                        a50: R_ARM_MOVT_ABS     __pv_phys_offset
     a54:       e3002000        movw    r2, #0
                        a54: R_ARM_MOVW_ABS_NC  __pv_phys_offset
     a58:       e3402000        movt    r2, #0          ; r2 = &__pv_phys_offset
                        a58: R_ARM_MOVT_ABS     __pv_phys_offset
     a5c:       e5999004        ldr     r9, [r9, #4]    ; r9 = high word of __pv_phys_offset
     a60:       e3001000        movw    r1, #0
                        a60: R_ARM_MOVW_ABS_NC  mem_map
     a64:       e592c000        ldr     ip, [r2]        ; ip = low word of __pv_phys_offset
Reviewed-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

My recent commit 871336a9 "ARM: at91: fix broken "if () else" statement"
introduced a typo because of a last-minute fixup. This adds the missing
closing parenthesis.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

CONFIG_PROC_DEVICETREE has been removed from the tree. This commit
removes a dangling select of the config symbol.
Signed-off-by: NGrant Likely <grant.likely@linaro.org>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Rob Herring <rob.herring@linaro.org>

By default if no fill symbol is given to .align directive in a code
section it fills gap with NOPs. If previous fragment is not
instruction-aligned, additional pre-alignment is done by zero bytes
before NOPs. These zero bytes are marked as data by special symbol $d in
symbol table. Unfortunately GAS assumes that there is only code in the
code section so it "puts back" code symbol $a at the end of this
pre-alignment. So if there is some data after alignment it will be
interpreted as code and will be swapped back to LE for BE8 system during
a final linking.

If explicit fill value is given to .align, the NOP-padding code is
skipped and symbol table does not get messed-up.

So the workaround for this issue:
Use explicit fill value if data should be aligned in the code section.
Acked-by: NBen Dooks <ben.dooks@codethink.co.uk>
Acked-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>

The kprobes test will build certain instructions incorrectly if building
big endian as .word/.short output gets endian-swapped by the linker.
Change to using <asm/opcodes.h> and __inst_thumbXX() to produce instructions.
Acked-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>

The kprobes test will build certain instructions incorrectly if building
big endian as .word output gets endian-swapped by the linker. Change to
using <asm/opcodes.h> and __inst_arm() to produce instructions.
Acked-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
[taras.kondratiuk@linaro.org: fixed unsupported coprocessor instructions]
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>

Ensure we read instructions in the correct endian-ness by using
the <asm/opcodes.h> helper to transform them as necessary.
Acked-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
[taras.kondratiuk@linaro.org: fix next_instruction() function]
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>

If we are running BE8, the data and instruction endianness do not
match, so use <asm/opcodes.h> to correctly translate memory accesses
into ARM instructions.
Acked-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
[taras.kondratiuk@linaro.org: fixed Thumb instruction fetch order]
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>

Due to some unfortunate history, POSIX locks have very strange and
unhelpful semantics. The thing that usually catches people by surprise
is that they are dropped whenever the process closes any file descriptor
associated with the inode.

This is extremely problematic for people developing file servers that
need to implement byte-range locks. Developers often need a "lock
management" facility to ensure that file descriptors are not closed
until all of the locks associated with the inode are finished.

Additionally, "classic" POSIX locks are owned by the process. Locks
taken between threads within the same process won't conflict with one
another, which renders them useless for synchronization between threads.

This patchset adds a new type of lock that attempts to address these
issues. These locks conflict with classic POSIX read/write locks, but
have semantics that are more like BSD locks with respect to inheritance
and behavior on close.

This is implemented primarily by changing how fl_owner field is set for
these locks. Instead of having them owned by the files_struct of the
process, they are instead owned by the filp on which they were acquired.
Thus, they are inherited across fork() and are only released when the
last reference to a filp is put.

These new semantics prevent them from being merged with classic POSIX
locks, even if they are acquired by the same process. These locks will
also conflict with classic POSIX locks even if they are acquired by
the same process or on the same file descriptor.

The new locks are managed using a new set of cmd values to the fcntl()
syscall. The initial implementation of this converts these values to
"classic" cmd values at a fairly high level, and the details are not
exposed to the underlying filesystem. We may eventually want to push
this handing out to the lower filesystem code but for now I don't
see any need for it.

Also, note that with this implementation the new cmd values are only
available via fcntl64() on 32-bit arches. There's little need to
add support for legacy apps on a new interface like this.
Signed-off-by: NJeff Layton <jlayton@redhat.com>

The IRQ line used in sun6i-a31.dtsi for the NMI controller is wrong.
This causes a IRQ storm since the NMI controller is repeatedly fired.
This patch fixes this problem assigning the correct IRQ number to the
NMI controller.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NCarlo Caione <carlo@caione.org>
Cc: maxime.ripard@free-electrons.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
Link: http://lkml.kernel.org/r/1395939759-11135-2-git-send-email-carlo@caione.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch adds a jited flag into sk_filter struct in order to indicate
whether a filter is currently jited or not. The size of sk_filter is
not being expanded as the 32 bit 'len' member allows upper bits to be
reused since a filter can currently only grow as large as BPF_MAXINSNS.

Therefore, there's enough room also for other in future needed flags to
reuse 'len' field if necessary. The jited flag also allows for having
alternative interpreter functions running as currently, we can only
detect jit compiled filters by testing fp->bpf_func to not equal the
address of sk_run_filter().

Joint work with Alexei Starovoitov.
Signed-off-by: NAlexei Starovoitov <ast@plumgrid.com>
Signed-off-by: NDaniel Borkmann <dborkman@redhat.com>
Cc: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>