1. 17 2月, 2016 1 次提交
  2. 11 2月, 2016 1 次提交
  3. 15 12月, 2015 1 次提交
    • D
      drm/doc: Convert to markdown · f03d8ede
      Danilo Cesar Lemes de Paula 提交于
      DRM Docbook is now Markdown ready. This means its doc is able to
      use markdown text on it.
      
      * Documentation/DocBook/drm.tmpl: Contains a table duplicated from
        drivers/gpu/drm/i915/i915_reg.h. This is not needed anymore
      
      * drivers/gpu/drm/drm_modeset_lock.c: had a code example that used
        to look pretty bad on html. Fixed by using proper code markup.
      
      * drivers/gpu/drm/drm_prime.c: Remove spaces between lines to make
        a proper markup list.
      
      * drivers/gpu/drm/i915/i915_reg.h: Altought pandoc supports tables,
        it doesn't support table cell spanning. But we can use fixed-width
        for those special cases.
      
      * include/drm/drm_vma_manager.h: Another code example that should be
        proper indented with four spaces.
      
      v2 (Daniel): Adjust name to gpu.xml due to rename.
      
      v3 (Daniel):
      Split out the actual enabling in the Makefile - this way we can merge
      the conversion, while just keeping the enabling in a drm-private tree.
      
      Signed-off-by: Danilo Cesar Lemes de Paula <danilo.cesar@collabora.co.uk> (v1)
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: Stephan Mueller <smueller@chronox.de>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
      Cc: dri-devel <dri-devel@lists.freedesktop.org>
      Acked-by: NDave Airlie <airlied@redhat.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1448471279-19748-2-git-send-email-daniel.vetter@ffwll.ch
      f03d8ede
  4. 12 12月, 2015 1 次提交
  5. 08 12月, 2015 1 次提交
  6. 05 12月, 2015 1 次提交
  7. 02 12月, 2015 2 次提交
  8. 18 11月, 2015 12 次提交
  9. 16 11月, 2015 3 次提交
  10. 10 11月, 2015 4 次提交
  11. 05 11月, 2015 1 次提交
  12. 26 10月, 2015 1 次提交
  13. 13 10月, 2015 7 次提交
  14. 07 10月, 2015 1 次提交
  15. 06 10月, 2015 1 次提交
  16. 02 10月, 2015 2 次提交
    • S
      drm/i915/bxt: Modify BXT BLC according to VBT changes · 022e4e52
      Sunil Kamath 提交于
      Latest VBT mentions which set of registers will be used for BLC,
      as controller number field. Making use of this field in BXT
      BLC implementation. Also, the registers are used in case control
      pin indicates display DDI. Adding a check for this.
      According to Bspec, BLC_PWM_*_2 uses the display utility pin for output.
      To use backlight 2, enable the utility pin with mode = PWM
         v2: Jani's review comments
         addressed
             - Add a prefix _ to BXT BLC registers definitions.
             - Add "bxt only" comment for u8 controller
             - Remove control_pin check for DDI controller
             - Check for valid controller values
             - Set pipe bits in UTIL_PIN_CTL
             - Enable/Disable UTIL_PIN_CTL in enable/disable_backlight()
             - If BLC 2 is used, read active_low_pwm from UTIL_PIN polarity
         Satheesh's review comment addressed
             - If UTIL PIN is already enabled, BIOS would have programmed it. No
             need to disable and enable again.
         v3: Jani's review comments
             - add UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK
             - Disable UTIL_PIN if controller 1 is used
             - Mask out UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK before enabling
             UTIL_PIN
             - check valid controller value in intel_bios.c
             - add backlight.util_pin_active_low
             - disable util pin before enabling
         v4: Change for BXT-PO branch:
         Stubbed unwanted definition which was existing before
         because of DC6 patch.
         UTIL_PIN_MODE_PWM     (0x1b << 24)
      
      v2: Fixed Jani's review comment.
      
      v3: Split the backight PWM frequency programming into separate patch,
          in cases BIOS doesn't initializes it.
      
      v4: Starting afresh and not modifying existing state for backlight, as
          per Jani's recommendation.
      
      v5: Fixed Jani's review comment wrt util pin enable
      Signed-off-by: NVandana Kannan <vandana.kannan@intel.com>
      Signed-off-by: NSunil Kamath <sunil.kamath@intel.com>
      Signed-off-by: NUma Shankar <uma.shankar@intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      022e4e52
    • S
      drm/i915/bxt: Program Tx Rx and Dphy clocks · 11b8e4f5
      Shashank Sharma 提交于
      BXT DSI clocks are different than previous platforms. So adding a
      new function to program following clocks and dividers:
      1. Program variable divider to generate input to Tx clock divider
         (Output value must be < 39.5Mhz)
      2. Select divide by 2 option to get < 20Mhz for Tx clock
      3. Program 8by3 divider to generate Rx clock
      
      v2: Fixed Jani's review comments. Adjusted the Macro definition as
          per convention. Simplified the logic for bit definitions for
          MIPI PORT A and PORT C in same registers.
      
      v3: Refactored the macros for TX, RX Escape and DPHY clocks as per
          Jani's suggestion.
      
      v4: Addressed Jani's review comments.
      Signed-off-by: NShashank Sharma <shashank.sharma@intel.com>
      Signed-off-by: NUma Shankar <uma.shankar@intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      11b8e4f5