1. 18 2月, 2014 8 次提交
  2. 14 2月, 2014 1 次提交
  3. 10 2月, 2014 4 次提交
  4. 09 2月, 2014 12 次提交
  5. 08 2月, 2014 15 次提交
    • R
      watchdog: dw_wdt: Add dependency on HAS_IOMEM · 1ccfe6f9
      Richard Weinberger 提交于
      On archs like S390 or um this driver cannot build nor work.
      Make it depend on HAS_IOMEM to bypass build failures.
      
      drivers/built-in.o: In function `dw_wdt_drv_probe':
      drivers/watchdog/dw_wdt.c:302: undefined reference to `devm_ioremap_resource'
      Signed-off-by: NRichard Weinberger <richard@nod.at>
      Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
      1ccfe6f9
    • L
      Merge tag 'driver-core-3.14-rc2' of... · 34a9bff4
      Linus Torvalds 提交于
      Merge tag 'driver-core-3.14-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
      
      Pull driver core fix from Greg KH:
       "Here is a single kernfs fix to resolve a much-reported lockdep issue
        with the removal of entries in sysfs"
      
      * tag 'driver-core-3.14-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
        kernfs: make kernfs_deactivate() honor KERNFS_LOCKDEP flag
      34a9bff4
    • L
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client · 41f76d8b
      Linus Torvalds 提交于
      Pull ceph fixes from Sage Weil:
       "There is an RBD fix for a crash due to the immutable bio changes, an
        error path fix, and a locking fix in the recent redirect support"
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client:
        libceph: do not dereference a NULL bio pointer
        libceph: take map_sem for read in handle_reply()
        libceph: factor out logic from ceph_osdc_start_request()
        libceph: fix error handling in ceph_osdc_init()
      41f76d8b
    • L
      Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux · 42be3f35
      Linus Torvalds 提交于
      Pull arm64 fixes from Catalin Marinas:
       - Relax VDSO alignment requirements so that the kernel-picked one (4K)
         does not conflict with the dynamic linker's one (64K)
       - VDSO gettimeofday fix
       - Barrier fixes for atomic operations and cache flushing
       - TLB invalidation when overriding early page mappings during boot
       - Wired up new 32-bit arm (compat) syscalls
       - LSM_MMAP_MIN_ADDR when COMPAT is enabled
       - defconfig update
       - Clean-up (comments, pgd_alloc).
      
      * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
        arm64: defconfig: Expand default enabled features
        arm64: asm: remove redundant "cc" clobbers
        arm64: atomics: fix use of acquire + release for full barrier semantics
        arm64: barriers: allow dsb macro to take option parameter
        security: select correct default LSM_MMAP_MIN_ADDR on arm on arm64
        arm64: compat: Wire up new AArch32 syscalls
        arm64: vdso: update wtm fields for CLOCK_MONOTONIC_COARSE
        arm64: vdso: fix coarse clock handling
        arm64: simplify pgd_alloc
        arm64: fix typo: s/SERRROR/SERROR/
        arm64: Invalidate the TLB when replacing pmd entries during boot
        arm64: Align CMA sizes to PAGE_SIZE
        arm64: add DSB after icache flush in __flush_icache_all()
        arm64: vdso: prevent ld from aligning PT_LOAD segments to 64k
      42be3f35
    • L
      Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus · d94d0e27
      Linus Torvalds 提交于
      Pull MIPS updates from Ralf Baechle:
       "hree minor patches.  All have sat in -next for a few days"
      
      * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
        MIPS: fpu.h: Fix build when CONFIG_BUG is not set
        MIPS: Wire up sched_setattr/sched_getattr syscalls
        MIPS: Alchemy: Fix DB1100 GPIO registration
      d94d0e27
    • L
      Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media · 3e382dd9
      Linus Torvalds 提交于
      Pull media fixes from Mauro Carvalho Chehab:
       "A series of small fixes.  Mostly driver ones.  There is one core
        regression fix on a patch that was meant to fix some race issues on
        vb2, but that actually caused more harm than good.  So, we're just
        reverting it for now"
      
      * 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
        [media] adv7842: Composite free-run platfrom-data fix
        [media] v4l2-dv-timings: fix GTF calculation
        [media] hdpvr: Fix memory leak in debug
        [media] af9035: add ID [2040:f900] Hauppauge WinTV-MiniStick 2
        [media] mxl111sf: Fix compile when CONFIG_DVB_USB_MXL111SF is unset
        [media] mxl111sf: Fix unintentional garbage stack read
        [media] cx24117: use a valid dev pointer for dev_err printout
        [media] cx24117: remove dead code in always 'false' if statement
        [media] update Michael Krufky's email address
        [media] vb2: Check if there are buffers before streamon
        [media] Revert "[media] videobuf_vm_{open,close} race fixes"
        [media] go7007-loader: fix usb_dev leak
        [media] media: bt8xx: add missing put_device call
        [media] exynos4-is: Compile in fimc-lite runtime PM callbacks conditionally
        [media] exynos4-is: Compile in fimc runtime PM callbacks conditionally
        [media] exynos4-is: Fix error paths in probe() for !pm_runtime_enabled()
        [media] s5p-jpeg: Fix wrong NV12 format parameters
        [media] s5k5baf: allow to handle arbitrary long i2c sequences
      3e382dd9
    • L
      Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging · 2091f435
      Linus Torvalds 提交于
      Pull hwmon fixes from Guenter Roeck:
       "Fix PMBus driver problem with some multi-page voltage sensors and fix
        da9055 interrupt initialization"
      
      * tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
        hwmon: (da9055) Remove use of regmap_irq_get_virq()
        hwmon: (pmbus) Support per-page exponent in linear mode
      2091f435
    • L
      Merge tag 'pm+acpi-3.14-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm · 22446d3f
      Linus Torvalds 提交于
      Pull ACPI and power management fixes from Rafael Wysocki:
       "These include a fix for a recent ACPI hotplug regression, four
        concurrency related fixes and one PCI device removal fix for
        ACPI-based PCI hotplug (ACPIPHP), intel_pstate fix that should go into
        stable, three simple ACPI cleanups and a new entry for the ACPI video
        blacklist.
      
        Specifics:
      
         - Fix for a recent ACPI hotplug regression causing a NULL pointer
           dereference to occur while handling ACPI eject notifications for
           already ejected devices.  From Toshi Kani.
      
         - Four concurrency-related fixes for ACPIPHP.  Two of them add
           missing locking and the other two fix race conditions related to
           reference counting.
      
         - ACPIPHP fix to avoid NULL pointer dereferences during device
           removal involving Virtual Funcions.
      
         - intel_pstate fix to make it compute the percentage of time the CPU
           is busy properly.  From Dirk Brandewie.
      
         - Removal of two unnecessary NULL pointer checks in ACPI code and a
           fix for sscanf() format string from Dan Carpenter and Luis G.F.
      
         - New ACPI video blacklist entry for HP EliteBook Revolve 810 from
           Mika Westerberg"
      
      * tag 'pm+acpi-3.14-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
        ACPI / hotplug: Fix panic on eject to ejected device
        ACPI / battery: Fix incorrect sscanf() string in acpi_battery_init_alarm()
        ACPI / proc: remove unneeded NULL check
        ACPI / utils: remove a pointless NULL check
        ACPI / video: Add HP EliteBook Revolve 810 to the blacklist
        intel_pstate: Take core C0 time into account for core busy calculation
        ACPI / hotplug / PCI: Fix bridge removal race vs dock events
        ACPI / hotplug / PCI: Fix bridge removal race in handle_hotplug_event()
        ACPI / hotplug / PCI: Scan root bus under the PCI rescan-remove lock
        ACPI / hotplug / PCI: Move PCI rescan-remove locking to hotplug_event()
        ACPI / hotplug / PCI: Remove entries from bus->devices in reverse order
      22446d3f
    • I
      libceph: do not dereference a NULL bio pointer · 0ec1d15e
      Ilya Dryomov 提交于
      Commit f38a5181 ("ceph: Convert to immutable biovecs") introduced
      a NULL pointer dereference, which broke rbd in -rc1.  Fix it.
      
      Cc: Kent Overstreet <kmo@daterainc.com>
      Signed-off-by: NIlya Dryomov <ilya.dryomov@inktank.com>
      Reviewed-by: NSage Weil <sage@inktank.com>
      0ec1d15e
    • H
      Merge tag 'efi-urgent' into x86/urgent · a3b072cd
      H. Peter Anvin 提交于
       * Avoid WARN_ON() when mapping BGRT on Baytrail (EFI 32-bit).
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      a3b072cd
    • I
      libceph: take map_sem for read in handle_reply() · ff513ace
      Ilya Dryomov 提交于
      Handling redirect replies requires both map_sem and request_mutex.
      Taking map_sem unconditionally near the top of handle_reply() avoids
      possible race conditions that arise from releasing request_mutex to be
      able to acquire map_sem in redirect reply case.  (Lock ordering is:
      map_sem, request_mutex, crush_mutex.)
      Signed-off-by: NIlya Dryomov <ilya.dryomov@inktank.com>
      Reviewed-by: NSage Weil <sage@inktank.com>
      ff513ace
    • I
      libceph: factor out logic from ceph_osdc_start_request() · 0bbfdfe8
      Ilya Dryomov 提交于
      Factor out logic from ceph_osdc_start_request() into a new helper,
      __ceph_osdc_start_request().  ceph_osdc_start_request() now amounts to
      taking locks and calling __ceph_osdc_start_request().
      Signed-off-by: NIlya Dryomov <ilya.dryomov@inktank.com>
      Reviewed-by: NSage Weil <sage@inktank.com>
      0bbfdfe8
    • M
      arm64: defconfig: Expand default enabled features · 55834a77
      Mark Rutland 提交于
      FPGA implementations of the Cortex-A57 and Cortex-A53 are now available
      in the form of the SMM-A57 and SMM-A53 Soft Macrocell Models (SMMs) for
      Versatile Express. As these attach to a Motherboard Express V2M-P1 it
      would be useful to have support for some V2M-P1 peripherals enabled by
      default.
      
      Additionally a couple of of features have been introduced since the last
      defconfig update (CMA, jump labels) that would be good to have enabled
      by default to ensure they are build and boot tested.
      
      This patch updates the arm64 defconfig to enable support for these
      devices and features. The arm64 Kconfig is modified to select
      HAVE_PATA_PLATFORM, which is required to enable support for the
      CompactFlash controller on the V2M-P1.
      
      A few options which don't need to appear in defconfig are trimmed:
      
      * BLK_DEV - selected by default
      * EXPERIMENTAL - otherwise gone from the kernel
      * MII - selected by drivers which require it
      * USB_SUPPORT - selected by default
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      55834a77
    • W
      arm64: asm: remove redundant "cc" clobbers · 95c41896
      Will Deacon 提交于
      cbnz/tbnz don't update the condition flags, so remove the "cc" clobbers
      from inline asm blocks that only use these instructions to implement
      conditional branches.
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      95c41896
    • W
      arm64: atomics: fix use of acquire + release for full barrier semantics · 8e86f0b4
      Will Deacon 提交于
      Linux requires a number of atomic operations to provide full barrier
      semantics, that is no memory accesses after the operation can be
      observed before any accesses up to and including the operation in
      program order.
      
      On arm64, these operations have been incorrectly implemented as follows:
      
      	// A, B, C are independent memory locations
      
      	<Access [A]>
      
      	// atomic_op (B)
      1:	ldaxr	x0, [B]		// Exclusive load with acquire
      	<op(B)>
      	stlxr	w1, x0, [B]	// Exclusive store with release
      	cbnz	w1, 1b
      
      	<Access [C]>
      
      The assumption here being that two half barriers are equivalent to a
      full barrier, so the only permitted ordering would be A -> B -> C
      (where B is the atomic operation involving both a load and a store).
      
      Unfortunately, this is not the case by the letter of the architecture
      and, in fact, the accesses to A and C are permitted to pass their
      nearest half barrier resulting in orderings such as Bl -> A -> C -> Bs
      or Bl -> C -> A -> Bs (where Bl is the load-acquire on B and Bs is the
      store-release on B). This is a clear violation of the full barrier
      requirement.
      
      The simple way to fix this is to implement the same algorithm as ARMv7
      using explicit barriers:
      
      	<Access [A]>
      
      	// atomic_op (B)
      	dmb	ish		// Full barrier
      1:	ldxr	x0, [B]		// Exclusive load
      	<op(B)>
      	stxr	w1, x0, [B]	// Exclusive store
      	cbnz	w1, 1b
      	dmb	ish		// Full barrier
      
      	<Access [C]>
      
      but this has the undesirable effect of introducing *two* full barrier
      instructions. A better approach is actually the following, non-intuitive
      sequence:
      
      	<Access [A]>
      
      	// atomic_op (B)
      1:	ldxr	x0, [B]		// Exclusive load
      	<op(B)>
      	stlxr	w1, x0, [B]	// Exclusive store with release
      	cbnz	w1, 1b
      	dmb	ish		// Full barrier
      
      	<Access [C]>
      
      The simple observations here are:
      
        - The dmb ensures that no subsequent accesses (e.g. the access to C)
          can enter or pass the atomic sequence.
      
        - The dmb also ensures that no prior accesses (e.g. the access to A)
          can pass the atomic sequence.
      
        - Therefore, no prior access can pass a subsequent access, or
          vice-versa (i.e. A is strictly ordered before C).
      
        - The stlxr ensures that no prior access can pass the store component
          of the atomic operation.
      
      The only tricky part remaining is the ordering between the ldxr and the
      access to A, since the absence of the first dmb means that we're now
      permitting re-ordering between the ldxr and any prior accesses.
      
      From an (arbitrary) observer's point of view, there are two scenarios:
      
        1. We have observed the ldxr. This means that if we perform a store to
           [B], the ldxr will still return older data. If we can observe the
           ldxr, then we can potentially observe the permitted re-ordering
           with the access to A, which is clearly an issue when compared to
           the dmb variant of the code. Thankfully, the exclusive monitor will
           save us here since it will be cleared as a result of the store and
           the ldxr will retry. Notice that any use of a later memory
           observation to imply observation of the ldxr will also imply
           observation of the access to A, since the stlxr/dmb ensure strict
           ordering.
      
        2. We have not observed the ldxr. This means we can perform a store
           and influence the later ldxr. However, that doesn't actually tell
           us anything about the access to [A], so we've not lost anything
           here either when compared to the dmb variant.
      
      This patch implements this solution for our barriered atomic operations,
      ensuring that we satisfy the full barrier requirements where they are
      needed.
      
      Cc: <stable@vger.kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      8e86f0b4